First commit after moving files

This commit is contained in:
Patrick McDonagh
2017-07-11 13:46:07 -05:00
parent 9404fb56c8
commit c5713ae924
61 changed files with 8252 additions and 0 deletions

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/*
* Author: Nandkishor Sonar
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
/**
* @file
* @brief Analog input/output
*
* AIO is the anlog input & output interface to libmraa. It is used to read or
* set the voltage applied to an AIO pin.
*
* @snippet analogin_a0.c Interesting
*/
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include <unistd.h>
#include <stdint.h>
#include "common.h"
#include "gpio.h"
/**
* Opaque pointer definition to the internal struct _aio. This context refers
* to one single AIO pin on the board.
*/
typedef struct _aio* mraa_aio_context;
/**
* Initialise an Analog input device, connected to the specified pin
*
* @param pin Channel number to read ADC inputs
* @returns aio context or NULL
*/
mraa_aio_context mraa_aio_init(unsigned int pin);
/**
* Read the input voltage. By default mraa will shift the raw value up or down
* to a 10 bit value.
*
* @param dev The AIO context
* @returns The current input voltage or -1 for error
*/
int mraa_aio_read(mraa_aio_context dev);
/**
* Read the input voltage and return it as a normalized float (0.0f-1.0f).
*
* @param dev The AIO context
* @returns The current input voltage as a normalized float (0.0f-1.0f), error
* will be signaled by -1.0f
*/
float mraa_aio_read_float(mraa_aio_context dev);
/**
* Close the analog input context, this will free the memory for the context
*
* @param dev The AIO context
* @return Result of operation
*/
mraa_result_t mraa_aio_close(mraa_aio_context dev);
/**
* Set the bit value which mraa will shift the raw reading
* from the ADC to. I.e. 10bits
* @param dev the analog input context
* @param bits the bits the return from read should be i.e 10
*
* @return mraa result type
*/
mraa_result_t mraa_aio_set_bit(mraa_aio_context dev, int bits);
/**
* Gets the bit value mraa is shifting the analog read to.
* @param dev the analog input context
*
* @return bit value mraa is set return from the read function
*/
int mraa_aio_get_bit(mraa_aio_context dev);
#ifdef __cplusplus
}
#endif

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/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#include <stdexcept>
#include "aio.h"
#include "types.hpp"
namespace mraa
{
/**
* @brief API to Analog IO
*
* This file defines the aio interface for libmraa
*
* @snippet AioA0.cpp Interesting
*/
class Aio
{
public:
/**
* Aio Constructor, takes a pin number which will map directly to the
* board number
*
* @param pin channel number to read ADC inputs
*/
Aio(int pin)
{
m_aio = mraa_aio_init(pin);
if (m_aio == NULL) {
throw std::invalid_argument("Invalid AIO pin specified - do you have an ADC?");
}
}
/**
* Aio Constructor, takes a pointer to the AIO context and initialises
* the AIO class
*
* @param void * to an AIO context
*/
Aio(void* aio_context)
{
m_aio = (mraa_aio_context) aio_context;
if (m_aio == NULL) {
throw std::invalid_argument("Invalid AIO context");
}
}
/**
* Aio destructor
*/
~Aio()
{
mraa_aio_close(m_aio);
}
/**
* Read a value from the AIO pin. By default mraa will shift
* the raw value up or down to a 10 bit value.
*
* @throws std::invalid_argument in case of error
* @returns The current input voltage. By default, a 10bit value
*/
unsigned int
read()
{
int x = mraa_aio_read(m_aio);
if (x == -1) {
throw std::invalid_argument("Unknown error in Aio::read()");
}
return (unsigned int) x;
}
/**
* Read a value from the AIO pin and return it as a normalized float.
*
* @throws std::invalid_argument in case of error
* @returns The current input voltage as a normalized float (0.0f-1.0f)
*/
float
readFloat()
{
float x = mraa_aio_read_float(m_aio);
if (x == -1.0f) {
throw std::invalid_argument("Unknown error in Aio::readFloat()");
}
return x;
}
/**
* Set the bit value which mraa will shift the raw reading
* from the ADC to. I.e. 10bits
* @param bits the bits the return from read should be i.e 10
* @return mraa::Result type
*/
Result
setBit(int bits)
{
return (Result) mraa_aio_set_bit(m_aio, bits);
}
/**
* Gets the bit value mraa is shifting the analog read to.
*
* @return bit value mraa is set return from the read function
*/
int
getBit()
{
return mraa_aio_get_bit(m_aio);
}
private:
mraa_aio_context m_aio;
};
}

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/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
* Copyright © 2014 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#pragma once
#include <stdint.h>
#include "types.h"
#define MRAA_PLATFORM_NAME_MAX_SIZE 64
#define MRAA_PIN_NAME_SIZE 12
#define MRAA_SUB_PLATFORM_BIT_SHIFT 9
#define MRAA_SUB_PLATFORM_MASK (1<<MRAA_SUB_PLATFORM_BIT_SHIFT)
#define MRAA_MAIN_PLATFORM_OFFSET 0
#define MRAA_SUB_PLATFORM_OFFSET 1
/** Executes function func and returns its result in case of error
*/
#define MRAA_RETURN_FOR_ERROR(func) do { \
mraa_result_t res; \
res = func; \
if (res != MRAA_SUCCESS) \
return res;} while(0)
/** @file
*
* This file defines the basic shared values for libmraa
*/
#ifdef __cplusplus
extern "C" {
#endif
/**
* MRAA boolean type
* 1 For TRUE
*/
typedef unsigned int mraa_boolean_t;
/**
* Initialise MRAA
*
* Detects running platform and attempts to use included pinmap, this is run on
* module/library init/load but is handy to rerun to check board initialised
* correctly. MRAA_SUCCESS inidicates correct initialisation.
*
* @return Result of operation
*/
#if (defined SWIGPYTHON) || (defined SWIG)
mraa_result_t mraa_init();
#else
// this sets a compiler attribute (supported by GCC & clang) to have mraa_init()
// be called as a constructor make sure your libc supports this! uclibc needs
// to be compiled with UCLIBC_CTOR_DTOR
mraa_result_t mraa_init() __attribute__((constructor));
#endif
/**
* De-Initilise MRAA
*
* This is not a strict requirement but useful to test memory leaks and for
* people who like super clean code. If dynamically loading & unloading
* libmraa you need to call this before unloading the library.
*/
void mraa_deinit();
/**
* Checks if a pin is able to use the passed in mode.
*
* @param pin Physical Pin to be checked.
* @param mode the mode to be tested.
* @return boolean if the mode is supported, 0=false.
*/
mraa_boolean_t mraa_pin_mode_test(int pin, mraa_pinmodes_t mode);
/**
* Check the board's bit size when reading the value
*
* @return raw bits being read from kernel module. zero if no ADC
*/
unsigned int mraa_adc_raw_bits();
/**
* Check the specified board's bit size when reading the value
*
* @param specified platform offset; 0 for main platform, 1 foor sub platform
* @return raw bits being read from kernel module. zero if no ADC
*/
unsigned int mraa_get_platform_adc_raw_bits(uint8_t platform_offset);
/**
* Return value that the raw value should be shifted to. Zero if no ADC
*
* @return return actual bit size the adc value should be understood as.
*/
unsigned int mraa_adc_supported_bits();
/**
* Return value that the raw value should be shifted to. Zero if no ADC
*
* @param specified platform offset; 0 for main platform, 1 foor sub platform
* @return return actual bit size the adc value should be understood as.
*/
unsigned int mraa_get_platform_adc_supported_bits(int platform_offset);
/**
* Sets the log level to use from 0-7 where 7 is very verbose. These are the
* syslog log levels, see syslog(3) for more information on the levels.
*
* @return Result of operation
*/
mraa_result_t mraa_set_log_level(int level);
/**
* Return the Platform's Name, If no platform detected return NULL
*
* @return platform name
*/
const char* mraa_get_platform_name();
/**
* Return the platform's versioning info, the information given depends per
* platform and can be NULL. platform_offset has to be given. Do not modify
* this pointer
*
* @param specified platform offset; 0 for main platform, 1 for sub platform
* @return platform's versioning string
*/
const char* mraa_get_platform_version(int platform_offset);
/**
* This function attempts to set the mraa process to a given priority and the
* scheduler to SCHED_RR. Highest * priority is typically 99 and minimum is 0.
* This function * will set to MAX if * priority is > MAX. Function will return
* -1 on failure.
*
* @param priority Value from typically 0 to 99
* @return The priority value set
*/
int mraa_set_priority(const int priority);
/** Get the version string of mraa autogenerated from git tag
*
* The version returned may not be what is expected however it is a reliable
* number associated with the git tag closest to that version at build time
*
* @return version string from version.h
*/
const char* mraa_get_version();
/**
* Print a textual representation of the mraa_result_t
*
* @param result the result to print
*/
void mraa_result_print(mraa_result_t result);
/**
* Get platform type, board must be initialised.
*
* @return mraa_platform_t Platform type enum
*/
mraa_platform_t mraa_get_platform_type();
/**
* Get combined platform type, board must be initialised.
* The combined type is represented as
* (sub_platform_type << 8) | main_platform_type
*
* @return int combined platform type
*/
int mraa_get_platform_combined_type();
/**
* Get platform pincount, board must be initialised.
*
* @return uint of physical pin count on the in-use platform
*/
unsigned int mraa_get_pin_count();
/**
* Get platform usable I2C bus count, board must be initialised.
*
* @return number f usable I2C bus count on the current platform. Function will
* return -1 on failure
*/
int mraa_get_i2c_bus_count();
/**
* Get I2C adapter number in sysfs.
*
* @param i2c_bus the logical I2C bus number
* @return I2C adapter number in sysfs. Function will return -1 on failure
*/
int mraa_get_i2c_bus_id(int i2c_bus);
/**
* Get specified platform pincount, board must be initialised.
*
* @param specified platform offset; 0 for main platform, 1 foor sub platform
* @return uint of physical pin count on the in-use platform
*/
unsigned int mraa_get_platform_pin_count(uint8_t platform_offset);
/**
* Get name of pin, board must be initialised.
*
* @param pin number
* @return char* of pin name
*/
char* mraa_get_pin_name(int pin);
/**
* Get default i2c bus, board must be initialised.
*
* @return int default i2c bus index
*/
int mraa_get_default_i2c_bus(uint8_t platform_offset);
/**
* Detect presence of sub platform.
*
* @return mraa_boolean_t 1 if sub platform is present and initialized, 0 otherwise
*/
mraa_boolean_t mraa_has_sub_platform();
/**
* Check if pin or bus id includes sub platform mask.
*
* @param int pin or bus number
*
* @return mraa_boolean_t 1 if pin or bus is for sub platform, 0 otherwise
*/
mraa_boolean_t mraa_is_sub_platform_id(int pin_or_bus_id);
/**
* Convert pin or bus index to corresponding sub platform id.
*
* @param int pin or bus index
*
* @return int sub platform pin or bus number
*/
int mraa_get_sub_platform_id(int pin_or_bus_index);
/**
* Convert pin or bus sub platform id to index.
*
* @param int sub platform pin or bus id
*
* @return int pin or bus index
*/
int mraa_get_sub_platform_index(int pin_or_bus_id);
/**
* Add mraa subplatform
*
* @param subplatform type
* @param uart device subplatform is on
*
* @return mraa_result_t indicating success
*/
mraa_result_t mraa_add_subplatform(mraa_platform_t subplatformtype, const char* uart_dev);
/**
* Remove a mraa subplatform
*
* @param subplatform type
*
* @return mraa_result indicating success
*/
mraa_result_t mraa_remove_subplatform(mraa_platform_t subplatformtype);
/**
* Create IO using a description in the format:
* [io]-[pin]
* [io]-[raw]-[pin]
* [io]-[raw]-[id]-[pin]
* [io]-[raw]-[path]
*
* @param IO description
*
* @return void* to IO context or NULL
*/
void* mraa_init_io(const char* desc);
#ifdef __cplusplus
}
#endif

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/*
* Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#include "common.h"
#include "types.hpp"
#include <string>
/**
* @namespace mraa namespace
*/
namespace mraa
{
/**
* @file
* @brief API to common functions of MRAA
*
* This file defines the interface for libmraa common functions
*/
/**
* Initialise MRAA
*
* Detects running platform and attempts to use included pinmap, this is run on
* module/library init/load but is handy to rerun to check board initialised
* correctly. mraa::SUCCESS inidicates correct initialisation.
*
* @return Result of operation
*/
inline Result
init()
{
return (Result) mraa_init();
}
/**
* Get libmraa version.
*
* @return libmraa version (e.g. v0.4.0-20-gb408207)
*/
inline std::string
getVersion()
{
std::string ret = mraa_get_version();
return ret;
}
/**
* This function attempts to set the mraa process to a given priority and the
* scheduler to SCHED_RR. Highest * priority is typically 99 and minimum is 0.
* This function * will set to MAX if * priority is > MAX. Function will return
* -1 on failure.
*
* @param priority Value from typically 0 to 99
* @return The priority value set
*/
inline int
setPriority(const int priority)
{
return mraa_set_priority(priority);
}
/**
* Get platform type, board must be initialised.
*
* @return mraa::platform Platform type enum
*/
inline Platform
getPlatformType()
{
return (Platform) mraa_get_platform_type();
}
/**
* Print a textual representation of the mraa::Result
*
* @param Result the Result to print
*/
inline void
printError(Result result)
{
mraa_result_print((mraa_result_t) result);
}
/**
* Checks if a pin is able to use the passed in mode.
*
* @param pin Physical Pin to be checked.
* @param mode the mode to be tested.
* @return boolean if the mode is supported, 0=false.
*/
inline bool
pinModeTest(int pin, Pinmodes mode)
{
return (bool) mraa_pin_mode_test(pin, (mraa_pinmodes_t) mode);
}
/**
* Check the board's bit size when reading the value
*
* @return raw bits being read from kernel module. Zero if no ADC
*/
inline unsigned int
adcRawBits()
{
return mraa_adc_raw_bits();
}
/**
* Return value that the raw value should be shifted to. Zero if no ADC
*
* @return return actual bit size the adc value should be understood as.
*/
inline unsigned int
adcSupportedBits()
{
return mraa_adc_supported_bits();
}
/**
* Return Platform Name. Returns NULL if no platform inited.
*
* @return platform name
*/
inline std::string
getPlatformName()
{
std::string ret_val(mraa_get_platform_name());
return ret_val;
}
/**
* Return platform versioning info. Returns NULL if no info present.
*
* @param optional subplatform identifier
* @return platform versioning info
*/
inline std::string
getPlatformVersion(int platform_offset=MRAA_MAIN_PLATFORM_OFFSET)
{
std::string ret_val(mraa_get_platform_version(platform_offset));
return ret_val;
}
/**
* Return count of physical pins on the running platform
*
* @return uint of physical pins.
*/
inline unsigned int
getPinCount()
{
return mraa_get_pin_count();
}
/**
* Get platform usable I2C bus count, board must be initialised.
*
* @return number f usable I2C bus count on the current platform. Function will
* return -1 on failure
*/
inline int
getI2cBusCount()
{
return mraa_get_i2c_bus_count();
}
/**
* Get I2C adapter number in sysfs.
*
* @param i2c_bus the logical I2C bus number
* @return I2C adapter number in sysfs. Function will return -1 on failure
*/
inline int
getI2cBusId(int i2c_bus)
{
return mraa_get_i2c_bus_id(i2c_bus);
}
/**
* Get name of pin, board must be initialised.
*
* @param pin number
*
* @return char* of pin name
*/
inline std::string
getPinName(int pin)
{
std::string ret_val(mraa_get_pin_name(pin));
return ret_val;
}
/**
* Sets the log level to use from 0-7 where 7 is very verbose. These are the
* syslog log levels, see syslog(3) for more information on the levels.
*
* @param level
* @return Result of operation
*/
inline Result
setLogLevel(int level)
{
return (Result) mraa_set_log_level(level);
}
/**
* Detect presence of sub platform.
*
* @return bool true if sub platform is present and initialized, false otherwise
*/
inline bool
hasSubPlatform()
{
return static_cast<bool>(mraa_has_sub_platform());
}
/**
* Check if pin or bus id includes sub platform mask.
*
* @param int pin or bus number
*
* @return mraa_boolean_t 1 if pin or bus is for sub platform, 0 otherwise
*/
inline bool
isSubPlatformId(int pin_or_bus_id)
{
return static_cast<bool>(mraa_is_sub_platform_id(pin_or_bus_id));
}
/**
* Convert pin or bus index to corresponding sub platform id.
*
* @param int pin or bus index
*
* @return int sub platform pin or bus number
*/
inline int
getSubPlatformId(int pin_or_bus_index)
{
return mraa_get_sub_platform_id(pin_or_bus_index);
}
/**
* Convert pin or bus sub platform id to index.
*
* @param int sub platform pin or bus id
*
* @return int pin or bus index
*/
inline int
getSubPlatformIndex(int pin_or_bus_id)
{
return mraa_get_sub_platform_index(pin_or_bus_id);
}
/**
* Get default i2c bus, board must be initialised.
*
* @param optional subplatform identifier
* @return default i2c bus for paltform
*/
inline int
getDefaultI2cBus(int platform_offset=MRAA_MAIN_PLATFORM_OFFSET)
{
return mraa_get_default_i2c_bus(platform_offset);
}
/**
* Add mraa subplatform
*
* @param subplatformtype the type of subplatform to add
* (e.g. MRAA_GENERIC_FIRMATA)
* @param uart_dev subplatform device string (e.g. "/dev/ttyACM0")
* @return Result of operation
*/
inline Result
addSubplatform(Platform subplatformtype, std::string uart_dev)
{
return (Result) mraa_add_subplatform((mraa_platform_t) subplatformtype, uart_dev.c_str());
}
inline Result
removeSubplatform(Platform subplatformtype)
{
return (Result) mraa_remove_subplatform((mraa_platform_t) subplatformtype);
}
/**
* Create IO using a description in the format:
* [io]-[pin]
* [io]-[raw]-[pin]
* [io]-[raw]-[id]-[pin]
* [io]-[raw]-[path]
*
* @param IO description
*
* @return class T initialised using pointer to IO or NULL
*/
template <class T>
inline T*
initIo(std::string desc)
{
return new T(mraa_init_io(desc.c_str()));
}
}

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/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright (c) 2016 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
/**
* @file
* @brief Firmata IO
*
* Firmata IO lets you SYSEX messages construct and ask for a callback on a
* SYSEX messages. This is meant to provide a way to call custom firmata APIs
* especially using the Custom firmata API
*
* @snippet firmata_curie_imu.c Interesting
*/
#ifdef __cplusplus
extern "C" {
#endif
#include "common.h"
/**
* Opaque pointer definition to the internal struct _firmata. This context
* refers to one firmata 'extension' letting you write/return SYSEX messages
* directly
*/
typedef struct _firmata* mraa_firmata_context;
/**
* Initialise firmata context on a feature. This feature is what will be
* listened on if you request a response callback
*
* @param firmata feature
* @return firmata context or NULL
*/
mraa_firmata_context mraa_firmata_init(int feature);
/**
* Sends a custom SYSEX message to the firmata board.
*
* @param dev The Firmata context
* @param msg The SYSEX message
* @param length The length of the sysex message
*/
mraa_result_t mraa_firmata_write_sysex(mraa_firmata_context dev, char* msg, int length);
/**
* Set a callback on 'feature'. This function is not thread safe and threads
* calling it need to make sure they are the only thread calling this.
*
* @param dev The Firmata context
* @param fptr Function pointer to function to be called when interrupt is
* triggered, the returned buffer and length are the arguments.
* @return Result of operation
*/
mraa_result_t mraa_firmata_response(mraa_firmata_context dev, void (*fptr)(uint8_t*, int));
/**
* Stop getting events on feature. This is more efficient than mraa_firmata_close
* as it can be re-enabled without adding a feature
*
* @param dev The Firmata context
* @return Result of operation
*/
mraa_result_t mraa_firmata_response_stop(mraa_firmata_context dev);
/**
* Free all firmata handle resources, this will leave an element in an array
* internally that will be skipped, avoid closing many firmata contexts often
* as there is a cost to doing this
*
* @param dev The Firmata context
* @return Result of operation
*/
mraa_result_t mraa_firmata_close(mraa_firmata_context dev);
#ifdef __cplusplus
}
#endif

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/*
* Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
/**
* @file
* @brief General Purpose IO
*
* Gpio is the General Purpose IO interface to libmraa. Its features depend on
* the board type used, it can use gpiolibs (exported via a kernel module
* through sysfs), or memory mapped IO via a /dev/uio device or /dev/mem
* depending again on the board configuration.
*
* @snippet gpio_read6.c Interesting
*/
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include <pthread.h>
#include "common.h"
#if defined(SWIGJAVA) || defined(JAVACALLBACK)
#include <jni.h>
extern "C" {
void mraa_java_isr_callback(void *args);
}
#endif
/**
* Opaque pointer definition to the internal struct _gpio
*/
typedef struct _gpio* mraa_gpio_context;
/**
* Gpio Output modes
*/
typedef enum {
MRAA_GPIO_STRONG = 0, /**< Default. Strong high and low */
MRAA_GPIO_PULLUP = 1, /**< Resistive High */
MRAA_GPIO_PULLDOWN = 2, /**< Resistive Low */
MRAA_GPIO_HIZ = 3 /**< High Z State */
} mraa_gpio_mode_t;
/**
* Gpio Direction options
*/
typedef enum {
MRAA_GPIO_OUT = 0, /**< Output. A Mode can also be set */
MRAA_GPIO_IN = 1, /**< Input */
MRAA_GPIO_OUT_HIGH = 2, /**< Output. Init High */
MRAA_GPIO_OUT_LOW = 3 /**< Output. Init Low */
} mraa_gpio_dir_t;
/**
* Gpio Edge types for interrupts
*/
typedef enum {
MRAA_GPIO_EDGE_NONE = 0, /**< No interrupt on Gpio */
MRAA_GPIO_EDGE_BOTH = 1, /**< Interrupt on rising & falling */
MRAA_GPIO_EDGE_RISING = 2, /**< Interrupt on rising only */
MRAA_GPIO_EDGE_FALLING = 3 /**< Interrupt on falling only */
} mraa_gpio_edge_t;
/**
* Initialise gpio_context, based on board number
*
* @param pin Pin number read from the board, i.e IO3 is 3
* @returns gpio context or NULL
*/
mraa_gpio_context mraa_gpio_init(int pin);
/**
* Initialise gpio context without any mapping to a pin
*
* @param gpiopin gpio pin as listed in SYSFS
* @return gpio context or NULL
*/
mraa_gpio_context mraa_gpio_init_raw(int gpiopin);
/**
* Set the edge mode on the gpio
*
* @param dev The Gpio context
* @param mode The edge mode to set the gpio into
* @return Result of operation
*/
mraa_result_t mraa_gpio_edge_mode(mraa_gpio_context dev, mraa_gpio_edge_t mode);
/**
* Set an interrupt on pin
*
* @param dev The Gpio context
* @param edge The edge mode to set the gpio into
* @param fptr Function pointer to function to be called when interrupt is
* triggered
* @param args Arguments passed to the interrupt handler (fptr)
* @return Result of operation
*/
mraa_result_t mraa_gpio_isr(mraa_gpio_context dev, mraa_gpio_edge_t edge, void (*fptr)(void*), void* args);
/**
* Stop the current interrupt watcher on this Gpio, and set the Gpio edge mode
* to MRAA_GPIO_EDGE_NONE
*
* @param dev The Gpio context
* @return Result of operation
*/
mraa_result_t mraa_gpio_isr_exit(mraa_gpio_context dev);
/**
* Set Gpio Output Mode,
*
* @param dev The Gpio context
* @param mode The Gpio Output Mode
* @return Result of operation
*/
mraa_result_t mraa_gpio_mode(mraa_gpio_context dev, mraa_gpio_mode_t mode);
/**
* Set Gpio direction
*
* @param dev The Gpio context
* @param dir The direction of the Gpio
* @return Result of operation
*/
mraa_result_t mraa_gpio_dir(mraa_gpio_context dev, mraa_gpio_dir_t dir);
/**
* Read Gpio direction
*
* @param dev The Gpio context
* @param dir The address where to store the Gpio direction
* @return Result of operation
*/
mraa_result_t mraa_gpio_read_dir(mraa_gpio_context dev, mraa_gpio_dir_t *dir);
/**
* Close the Gpio context
* - Will free the memory for the context and unexport the Gpio
*
* @param dev The Gpio context
* @return Result of operation
*/
mraa_result_t mraa_gpio_close(mraa_gpio_context dev);
/**
* Read the Gpio value. This can be 0 or 1. A resonse of -1 means that there
* was a fatal error.
*
* @param dev The Gpio context
* @return Result of operation
*/
int mraa_gpio_read(mraa_gpio_context dev);
/**
* Write to the Gpio Value.
*
* @param dev The Gpio context
* @param value Integer value to write
* @return Result of operation
*/
mraa_result_t mraa_gpio_write(mraa_gpio_context dev, int value);
/**
* Change ownership of the context.
*
* @param dev The Gpio context
* @param owner Does this context own the pin
* @return Result of operation
*/
mraa_result_t mraa_gpio_owner(mraa_gpio_context dev, mraa_boolean_t owner);
/**
* Enable using memory mapped io instead of sysfs
*
* @param dev The Gpio context
* @param mmap Use mmap instead of sysfs
* @return Result of operation
*/
mraa_result_t mraa_gpio_use_mmaped(mraa_gpio_context dev, mraa_boolean_t mmap);
/**
* Get a pin number of the gpio, invalid will return -1
*
* @param dev The Gpio context
* @return Pin number
*/
int mraa_gpio_get_pin(mraa_gpio_context dev);
/**
* Get a gpio number as used within sysfs, invalid will return -1
*
* @param dev The Gpio context
* @return gpio number
*/
int mraa_gpio_get_pin_raw(mraa_gpio_context dev);
#ifdef __cplusplus
}
#endif

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/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#include "gpio.h"
#include "types.hpp"
#include <stdexcept>
#if defined(SWIGJAVASCRIPT)
#if NODE_MODULE_VERSION >= 0x000D
#include <uv.h>
#endif
#endif
namespace mraa
{
// These enums must match the enums in gpio.h
/**
* Gpio Output modes
*/
typedef enum {
MODE_STRONG = 0, /**< Default. Strong High and Low */
MODE_PULLUP = 1, /**< Resistive High */
MODE_PULLDOWN = 2, /**< Resistive Low */
MODE_HIZ = 3 /**< High Z State */
} Mode;
/**
* Gpio Direction options
*/
typedef enum {
DIR_OUT = 0, /**< Output. A Mode can also be set */
DIR_IN = 1, /**< Input */
DIR_OUT_HIGH = 2, /**< Output. Init High */
DIR_OUT_LOW = 3 /**< Output. Init Low */
} Dir;
/**
* Gpio Edge types for interrupts
*/
typedef enum {
EDGE_NONE = 0, /**< No interrupt on Gpio */
EDGE_BOTH = 1, /**< Interrupt on rising & falling */
EDGE_RISING = 2, /**< Interrupt on rising only */
EDGE_FALLING = 3 /**< Interrupt on falling only */
} Edge;
/**
* @brief API to General Purpose IO
*
* This file defines the gpio interface for libmraa
*
* @snippet Blink-IO.cpp Interesting
*/
class Gpio
{
public:
/**
* Instantiates a Gpio object
*
* @param pin pin number to use
* @param owner (optional) Set pin owner, default behaviour is to 'own'
* the pin if we exported it. This means we will close it on destruct.
* Otherwise it will get left open. This is only valid in sysfs use
* cases
* @param raw (optional) Raw pins will use gpiolibs pin numbering from
* the kernel module. Note that you will not get any muxers set up for
* you so this may not always work as expected.
*/
Gpio(int pin, bool owner = true, bool raw = false)
{
if (raw) {
m_gpio = mraa_gpio_init_raw(pin);
} else {
m_gpio = mraa_gpio_init(pin);
}
if (m_gpio == NULL) {
throw std::invalid_argument("Invalid GPIO pin specified");
}
if (!owner) {
mraa_gpio_owner(m_gpio, 0);
}
}
/**
* Gpio Constructor, takes a pointer to the GPIO context and initialises
* the GPIO class
*
* @param void * to GPIO context
*/
Gpio(void* gpio_context)
{
m_gpio = (mraa_gpio_context) gpio_context;
if (m_gpio == NULL) {
throw std::invalid_argument("Invalid GPIO context");
}
}
/**
* Gpio object destructor, this will only unexport the gpio if we where
* the owner
*/
~Gpio()
{
mraa_gpio_close(m_gpio);
}
/**
* Set the edge mode for ISR
*
* @param mode The edge mode to set
* @return Result of operation
*/
Result
edge(Edge mode)
{
return (Result) mraa_gpio_edge_mode(m_gpio, (mraa_gpio_edge_t) mode);
}
#if defined(SWIGPYTHON)
Result
isr(Edge mode, PyObject* pyfunc, PyObject* args)
{
return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, (void (*) (void*)) pyfunc, (void*) args);
}
#elif defined(SWIGJAVASCRIPT)
static void
v8isr(uv_work_t* req, int status)
{
#if NODE_MODULE_VERSION >= 0x000D
v8::HandleScope scope(v8::Isolate::GetCurrent());
#endif
mraa::Gpio* This = (mraa::Gpio*) req->data;
int argc = 1;
v8::Local<v8::Value> argv[] = { SWIGV8_INTEGER_NEW(-1) };
#if NODE_MODULE_VERSION >= 0x000D
v8::Local<v8::Function> f = v8::Local<v8::Function>::New(v8::Isolate::GetCurrent(), This->m_v8isr);
f->Call(SWIGV8_CURRENT_CONTEXT()->Global(), argc, argv);
#else
This->m_v8isr->Call(SWIGV8_CURRENT_CONTEXT()->Global(), argc, argv);
#endif
delete req;
}
static void
nop(uv_work_t* req)
{
// Do nothing.
}
static void
uvwork(void* ctx)
{
uv_work_t* req = new uv_work_t;
req->data = ctx;
uv_queue_work(uv_default_loop(), req, nop, v8isr);
}
Result
isr(Edge mode, v8::Handle<v8::Function> func)
{
#if NODE_MODULE_VERSION >= 0x000D
m_v8isr.Reset(v8::Isolate::GetCurrent(), func);
#else
m_v8isr = v8::Persistent<v8::Function>::New(func);
#endif
return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, &uvwork, this);
}
#elif defined(SWIGJAVA) || defined(JAVACALLBACK)
Result
isr(Edge mode, jobject runnable)
{
return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, mraa_java_isr_callback, runnable);
}
#endif
/**
* Sets a callback to be called when pin value changes
*
* @param mode The edge mode to set
* @param fptr Function pointer to function to be called when interrupt is
* triggered
* @param args Arguments passed to the interrupt handler (fptr)
* @return Result of operation
*/
Result
isr(Edge mode, void (*fptr)(void*), void* args)
{
return (Result) mraa_gpio_isr(m_gpio, (mraa_gpio_edge_t) mode, fptr, args);
}
/**
* Exits callback - this call will not kill the isr thread immediately
* but only when it is out of it's critical section
*
* @return Result of operation
*/
Result
isrExit()
{
#if defined(SWIGJAVASCRIPT)
#if NODE_MODULE_VERSION >= 0x000D
m_v8isr.Reset();
#else
m_v8isr.Dispose();
m_v8isr.Clear();
#endif
#endif
return (Result) mraa_gpio_isr_exit(m_gpio);
}
/**
* Change Gpio mode
*
* @param mode The mode to change the gpio into
* @return Result of operation
*/
Result
mode(Mode mode)
{
return (Result )mraa_gpio_mode(m_gpio, (mraa_gpio_mode_t) mode);
}
/**
* Change Gpio direction
*
* @param dir The direction to change the gpio into
* @return Result of operation
*/
Result
dir(Dir dir)
{
return (Result )mraa_gpio_dir(m_gpio, (mraa_gpio_dir_t) dir);
}
/**
* Read Gpio direction
*
* @throw std::runtime_error in case of failure
* @return Result of operation
*/
Dir
readDir()
{
mraa_gpio_dir_t dir;
if (mraa_gpio_read_dir(m_gpio, &dir) != MRAA_SUCCESS) {
throw std::runtime_error("Failed to read direction");
}
return (Dir) dir;
}
/**
* Read value from Gpio
*
* @return Gpio value
*/
int
read()
{
return mraa_gpio_read(m_gpio);
}
/**
* Write value to Gpio
*
* @param value Value to write to Gpio
* @return Result of operation
*/
Result
write(int value)
{
return (Result) mraa_gpio_write(m_gpio, value);
}
/**
* Enable use of mmap i/o if available.
*
* @param enable true to use mmap
* @return Result of operation
*/
Result
useMmap(bool enable)
{
return (Result) mraa_gpio_use_mmaped(m_gpio, (mraa_boolean_t) enable);
}
/**
* Get pin number of Gpio. If raw param is True will return the
* number as used within sysfs. Invalid will return -1.
*
* @param raw (optional) get the raw gpio number.
* @return Pin number
*/
int
getPin(bool raw = false)
{
if (raw) {
return mraa_gpio_get_pin_raw(m_gpio);
}
return mraa_gpio_get_pin(m_gpio);
}
private:
mraa_gpio_context m_gpio;
#if defined(SWIGJAVASCRIPT)
v8::Persistent<v8::Function> m_v8isr;
#endif
};
}

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/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
/**
* @file
* @brief Inter-Integrated Circuit
*
* An i2c context represents a master on an i2c bus and that context can
* communicate to multiple i2c slaves by configuring the address.
* @htmlinclude i2c.txt
*
* @snippet i2c_HMC5883L.c Interesting
*/
#ifdef __cplusplus
extern "C" {
#endif
#include <stdlib.h>
#include <stdio.h>
#include <fcntl.h>
#include <stdint.h>
#include "common.h"
#include "gpio.h"
/**
* Opaque pointer definition to the internal struct _i2c
*/
typedef struct _i2c* mraa_i2c_context;
/**
* Initialise i2c context, using board defintions
*
* @param bus i2c bus to use
* @return i2c context or NULL
*/
mraa_i2c_context mraa_i2c_init(int bus);
/**
* Initialise i2c context, passing in the i2c bus to use.
*
* @param bus The i2c bus to use i.e. /dev/i2c-2 would be "2"
* @return i2c context or NULL
*/
mraa_i2c_context mraa_i2c_init_raw(unsigned int bus);
/**
* Sets the frequency of the i2c context. Most platforms do not support this.
*
* @param dev The i2c context
* @param mode The bus mode
* @return Result of operation
*/
mraa_result_t mraa_i2c_frequency(mraa_i2c_context dev, mraa_i2c_mode_t mode);
/**
* Simple bulk read from an i2c context
*
* @param dev The i2c context
* @param data pointer to the byte array to read data in to
* @param length max number of bytes to read
* @return length of the read in bytes or -1
*/
int mraa_i2c_read(mraa_i2c_context dev, uint8_t* data, int length);
/**
* Simple read for a single byte from the i2c context
*
* @param dev The i2c context
* @return The result of the read or -1 if failed
*/
int mraa_i2c_read_byte(mraa_i2c_context dev);
/**
* Read a single byte from i2c context, from designated register
*
* @param dev The i2c context
* @param command The register
* @return The result of the read or -1 if failed
*/
int mraa_i2c_read_byte_data(mraa_i2c_context dev, const uint8_t command);
/**
* Read a single word from i2c context, from designated register
*
* @param dev The i2c context
* @param command The register
* @return The result of the read or -1 if failed
*/
int mraa_i2c_read_word_data(mraa_i2c_context dev, const uint8_t command);
/**
* Bulk read from i2c context, starting from designated register
*
* @param dev The i2c context
* @param command The register
* @param data pointer to the byte array to read data in to
* @param length max number of bytes to read
* @return The length in bytes passed to the function or -1
*/
int mraa_i2c_read_bytes_data(mraa_i2c_context dev, uint8_t command, uint8_t* data, int length);
/**
* Write length bytes to the bus, the first byte in the array is the
* command/register to write
*
* @param dev The i2c context
* @param data pointer to the byte array to be written
* @param length the number of bytes to transmit
* @return Result of operation
*/
mraa_result_t mraa_i2c_write(mraa_i2c_context dev, const uint8_t* data, int length);
/**
* Write a single byte to an i2c context
*
* @param dev The i2c context
* @param data The byte to write
* @return Result of operation
*/
mraa_result_t mraa_i2c_write_byte(mraa_i2c_context dev, const uint8_t data);
/**
* Write a single byte to an i2c context
*
* @param dev The i2c context
* @param data The byte to write
* @param command The register
* @return Result of operation
*/
mraa_result_t mraa_i2c_write_byte_data(mraa_i2c_context dev, const uint8_t data, const uint8_t command);
/**
* Write a single word to an i2c context
*
* @param dev The i2c context
* @param data The word to write
* @param command The register
* @return Result of operation
*/
mraa_result_t mraa_i2c_write_word_data(mraa_i2c_context dev, const uint16_t data, const uint8_t command);
/**
* Sets the i2c slave address.
*
* @param dev The i2c context
* @param address The address to set for the slave (7-bit address)
* @return Result of operation
*/
mraa_result_t mraa_i2c_address(mraa_i2c_context dev, uint8_t address);
/**
* De-inits an mraa_i2c_context device
*
* @param dev The i2c context
* @return Result of operation
*/
mraa_result_t mraa_i2c_stop(mraa_i2c_context dev);
#ifdef __cplusplus
}
#endif

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/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#include "i2c.h"
#include "types.hpp"
#include <stdexcept>
namespace mraa
{
/**
* @brief API to Inter-Integrated Circuit
*
* An I2c object represents an i2c master and can talk multiple i2c slaves by
* selecting the correct address
* @htmlinclude i2c.txt
*
* @snippet I2c-compass.cpp Interesting
*/
class I2c
{
public:
/**
* Instantiates an i2c bus. Multiple instances of the same bus can
* exist and the bus is not guarranteed to be on the correct address
* before read/write.
*
* @param bus The i2c bus to use
* @param raw Whether to disable pinmapper for your board
*/
I2c(int bus, bool raw = false)
{
if (raw) {
m_i2c = mraa_i2c_init_raw(bus);
} else {
m_i2c = mraa_i2c_init(bus);
}
if (m_i2c == NULL) {
throw std::invalid_argument("Invalid i2c bus");
}
}
/**
* I2C constructor, takes a pointer to a I2C context and initialises the I2C class
*
* @param void * to an I2C context
*/
I2c(void* i2c_context)
{
m_i2c = (mraa_i2c_context) i2c_context;
if (m_i2c == NULL) {
throw std::invalid_argument("Invalid I2C context");
}
}
/**
* Closes the I2c Bus used. This does not guarrantee the bus will not
* be usable by anyone else or communicates this disconnect to any
* slaves.
*/
~I2c()
{
mraa_i2c_stop(m_i2c);
}
/**
* Sets the i2c Frequency for communication. Your board may not support
* the set frequency. Anyone can change this at any time and this will
* affect every slave on the bus
*
* @param mode Frequency to set the bus to
* @return Result of operation
*/
Result
frequency(I2cMode mode)
{
return (Result) mraa_i2c_frequency(m_i2c, (mraa_i2c_mode_t) mode);
}
/**
* Set the slave to talk to, typically called before every read/write
* operation
*
* @param address Communicate to the i2c slave on this address
* @return Result of operation
*/
Result
address(uint8_t address)
{
return (Result) mraa_i2c_address(m_i2c, address);
}
/**
* Read exactly one byte from the bus
*
* @throws std::invalid_argument in case of error
* @return char read from the bus
*/
uint8_t
readByte()
{
int x = mraa_i2c_read_byte(m_i2c);
if (x == -1) {
throw std::invalid_argument("Unknown error in I2c::readByte()");
}
return (uint8_t) x;
}
/**
* Read length bytes from the bus into *data pointer
*
* @param data Data to read into
* @param length Size of read in bytes to make
* @return length of read, should match length
*/
int
read(uint8_t* data, int length)
{
return mraa_i2c_read(m_i2c, data, length);
}
/**
* Read byte from an i2c register
*
* @param reg Register to read from
*
* @throws std::invalid_argument in case of error
* @return char read from register
*/
uint8_t
readReg(uint8_t reg)
{
int x = mraa_i2c_read_byte_data(m_i2c, reg);
if (x == -1) {
throw std::invalid_argument("Unknown error in I2c::readReg()");
}
return (uint8_t) x;
}
/**
* Read word from an i2c register
*
* @param reg Register to read from
*
* @throws std::invalid_argument in case of error
* @return char read from register
*/
uint16_t
readWordReg(uint8_t reg)
{
int x = mraa_i2c_read_word_data(m_i2c, reg);
if (x == -1) {
throw std::invalid_argument("Unknown error in I2c::readReg()");
}
return (uint16_t) x;
}
/**
* Read length bytes from the bus into *data pointer starting from
* an i2c register
*
* @param reg Register to read from
* @param data pointer to the byte array to read data in to
* @param length max number of bytes to read
* @return length passed to the function or -1
*/
int
readBytesReg(uint8_t reg, uint8_t* data, int length)
{
return mraa_i2c_read_bytes_data(m_i2c, reg, data, length);
}
/**
* Write a byte on the bus
*
* @param data The byte to send on the bus
* @return Result of operation
*/
Result
writeByte(uint8_t data)
{
return (Result) mraa_i2c_write_byte(m_i2c, data);
}
/**
* Write length bytes to the bus, the first byte in the array is the
* command/register to write
*
* @param data Buffer to send on the bus, first byte is i2c command
* @param length Size of buffer to send
* @return Result of operation
*/
Result
write(const uint8_t* data, int length)
{
return (Result) mraa_i2c_write(m_i2c, data, length);
}
/**
* Write a byte to an i2c register
*
* @param reg Register to write to
* @param data Value to write to register
* @return Result of operation
*/
Result
writeReg(uint8_t reg, uint8_t data)
{
return (Result) mraa_i2c_write_byte_data(m_i2c, data, reg);
}
/**
* Write a word to an i2c register
*
* @param reg Register to write to
* @param data Value to write to register
* @return Result of operation
*/
Result
writeWordReg(uint8_t reg, uint16_t data)
{
return (Result) mraa_i2c_write_word_data(m_i2c, data, reg);
}
private:
mraa_i2c_context m_i2c;
};
}

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/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright (c) 2015 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#include "common.h"
#include "iio_kernel_headers.h"
typedef struct {
int index;
int enabled;
char* type;
mraa_boolean_t lendian;
int signedd;
unsigned int offset;
uint64_t mask;
unsigned int bits_used;
unsigned int bytes;
unsigned int shift;
unsigned int location;
} mraa_iio_channel;
typedef struct {
char* name;
int enabled;
} mraa_iio_event;
/**
* @file
* @brief iio
*
* An iio context represents an IIO device
*
* @snippet iio_driver.c Interesting
*/
#ifdef __cplusplus
extern "C" {
#endif
#include <stdlib.h>
#include <stdio.h>
#include <fcntl.h>
#include <stdint.h>
#include "common.h"
/**
* Opaque pointer definition to the internal struct _iio
*/
typedef struct _iio* mraa_iio_context;
/**
* Initialise iio context
*
* @param bus iio device to use
* @return i2c context or NULL
*/
mraa_iio_context mraa_iio_init(int device);
mraa_result_t mraa_iio_trigger_buffer(mraa_iio_context dev, void (*fptr)(char* data), void* args);
const char* mraa_iio_get_device_name(mraa_iio_context dev);
int mraa_iio_get_device_num_by_name(const char* name);
int mraa_iio_read_size(mraa_iio_context dev);
mraa_iio_channel* mraa_iio_get_channels(mraa_iio_context dev);
int mraa_iio_get_channel_count(mraa_iio_context dev);
mraa_result_t mraa_iio_read_float(mraa_iio_context dev, const char* filename, float* data);
mraa_result_t mraa_iio_read_int(mraa_iio_context dev, const char* filename, int* data);
mraa_result_t mraa_iio_read_string(mraa_iio_context dev, const char* filename, char* data, int max_len);
mraa_result_t mraa_iio_write_float(mraa_iio_context dev, const char* attr_chan, const float data);
mraa_result_t mraa_iio_write_int(mraa_iio_context dev, const char* attr_chan, const int data);
mraa_result_t mraa_iio_write_string(mraa_iio_context dev, const char* attr_chan, const char* data);
mraa_result_t mraa_iio_get_channel_data(mraa_iio_context dev);
mraa_result_t mraa_iio_get_event_data(mraa_iio_context dev);
mraa_result_t mraa_iio_event_poll(mraa_iio_context dev, struct iio_event_data* data);
mraa_result_t
mraa_iio_event_setup_callback(mraa_iio_context dev, void (*fptr)(struct iio_event_data* data, void* args), void* args);
mraa_result_t mraa_iio_event_extract_event(struct iio_event_data* event,
int* chan_type,
int* modifier,
int* type,
int* direction,
int* channel,
int* channel2,
int* different);
mraa_result_t mraa_iio_get_mount_matrix(mraa_iio_context dev, const char *sysfs_name, float mm[9]);
mraa_result_t mraa_iio_create_trigger(mraa_iio_context dev, const char* trigger);
mraa_result_t mraa_iio_update_channels(mraa_iio_context dev);
/**
* De-inits an mraa_iio_context device
*
* @param dev The iio context
* @return Result of operation
*/
mraa_result_t mraa_iio_close(mraa_iio_context dev);
#ifdef __cplusplus
}
#endif

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/*
* Author: Henry Bruce <henry.bruce@intel.com>
* Copyright (c) 2015 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#include <stdexcept>
#include <sstream>
#include "iio.h"
#include "types.hpp"
namespace mraa
{
struct IioEventData
{
int channelType;
int modifier;
int type;
int direction;
int channel;
int channel2;
int diff;
};
class IioHandler
{
public:
virtual void onIioEvent(const IioEventData& eventData) = 0;
};
/**
* @brief API to Industrial IO
*
* This file defines the C++ iio interface for libmraa
*
* @snippet iio_dummy_test.cpp Interesting
*/
class Iio
{
public:
/**
* Iio Constructor, takes a device number which will map directly to sysfs
* e.g. device 0 maps to /sys/bus/iio/devices/iio:device0
*
* @param device IIO device number
*
* @throws std::invalid_argument if initialization fails
*/
Iio(int device)
{
m_iio = mraa_iio_init(device);
if (m_iio == NULL) {
std::ostringstream oss;
oss << "IIO device " << device << " is not valid";
throw std::invalid_argument(oss.str());
}
}
/**
* Iio Constructor
*
* @param deviceName IIO device name
*
* @throws std::invalid_argument if initialization fails
*/
Iio(const std::string& deviceName)
{
std::ostringstream oss;
int id = mraa_iio_get_device_num_by_name(deviceName.c_str());
if (id == -1) {
oss << "IIO device name " << deviceName << " not found";
throw std::invalid_argument(oss.str());
}
m_iio = mraa_iio_init(id);
if (m_iio == NULL) {
oss << "IIO device " << deviceName << " is not valid";
throw std::invalid_argument(oss.str());
}
}
/**
* Iio destructor
*/
~Iio()
{
mraa_iio_close(m_iio);
}
/**
* Get device name
*
* @returns The device name
*/
std::string
getDeviceName() const
{
return mraa_iio_get_device_name(m_iio);
}
/**
* Read an int value from specified attribute.
*
* @param attributeName attribute mame
*
* @returns The int value
*
* @throws std::invalid_argument if read fails
*/
int
readInt(const std::string& attributeName) const
{
int value;
mraa_result_t res = mraa_iio_read_int(m_iio, attributeName.c_str(), &value);
if (res != MRAA_SUCCESS) {
std::ostringstream oss;
oss << "IIO readInt for attibute " << attributeName << " failed";
throw std::runtime_error(oss.str());
}
return value;
}
/**
* Read a float value from specified attribute.
*
* @param attributeName attribute mame
*
* @returns The float value
*
* @throws std::invalid_argument if read fails
*/
float
readFloat(const std::string& attributeName) const
{
float value;
mraa_result_t res = mraa_iio_read_float(m_iio, attributeName.c_str(), &value);
if (res != MRAA_SUCCESS) {
std::ostringstream oss;
oss << "IIO readFloat for attibute " << attributeName << " failed";
throw std::runtime_error(oss.str());
}
return value;
}
/**
* Write an int value to specified attribute.
*
* @param attributeName attribute mame
* @param value int value
*
* @throws std::invalid_argument if write fails
*/
void
writeInt(const std::string& attributeName, int value) const
{
mraa_result_t res = mraa_iio_write_int(m_iio, attributeName.c_str(), value);
if (res != MRAA_SUCCESS) {
std::ostringstream oss;
oss << "IIO writeInt for attibute " << attributeName << " failed";
throw std::runtime_error(oss.str());
}
}
/**
* Write a float value to specified attribute.
*
* @param attributeName attribute mame
* @param value float value
*
* @throws std::invalid_argument if write fails
*/
void
writeFloat(const std::string& attributeName, float value) const
{
mraa_result_t res = mraa_iio_write_float(m_iio, attributeName.c_str(), value);
if (res != MRAA_SUCCESS) {
std::ostringstream oss;
oss << "IIO writeFloat for attibute " << attributeName << " failed";
throw std::runtime_error(oss.str());
}
}
/**
* Register event handler.
*
* @param handler handler class that implements IioHandler
*
* @throws std::invalid_argument on failure
*/
void
registerEventHandler(IioHandler* handler) const
{
mraa_result_t res = mraa_iio_event_setup_callback(m_iio, private_event_handler, handler);
if (res != MRAA_SUCCESS) {
throw std::runtime_error("registerEventHandler failed");
}
}
private:
static void private_event_handler(iio_event_data* data, void *args)
{
if (args != NULL) {
IioHandler* handler = (IioHandler*)args;
IioEventData eventData;
int chan_type, modifier, type, direction, channel, channel2, different;
mraa_iio_event_extract_event(data, &chan_type, &modifier, &type, &direction, &channel, &channel2, &different);
eventData.channelType = chan_type;
eventData.modifier = modifier;
eventData.type = type;
eventData.direction = direction;
eventData.channel = channel;
eventData.channel2 = channel2;
eventData.diff = different;
handler->onIioEvent(eventData);
}
}
mraa_iio_context m_iio;
};
}

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/*
* Author: Lay, Kuan Loon <kuan.loon.lay@intel.com>
* Copyright (c) 2015 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
//For kernel 4.1+,
//#include <linux/iio/types.h>
//#include <linux/iio/events.h>
//linux/iio/types.h
enum iio_chan_type {
IIO_VOLTAGE,
IIO_CURRENT,
IIO_POWER,
IIO_ACCEL,
IIO_ANGL_VEL,
IIO_MAGN,
IIO_LIGHT,
IIO_INTENSITY,
IIO_PROXIMITY,
IIO_TEMP,
IIO_INCLI,
IIO_ROT,
IIO_ANGL,
IIO_TIMESTAMP,
IIO_CAPACITANCE,
IIO_ALTVOLTAGE,
IIO_CCT,
IIO_PRESSURE,
IIO_HUMIDITYRELATIVE,
IIO_ACTIVITY,
IIO_STEPS,
IIO_ENERGY,
IIO_DISTANCE,
IIO_VELOCITY,
};
enum iio_modifier {
IIO_NO_MOD,
IIO_MOD_X,
IIO_MOD_Y,
IIO_MOD_Z,
IIO_MOD_X_AND_Y,
IIO_MOD_X_AND_Z,
IIO_MOD_Y_AND_Z,
IIO_MOD_X_AND_Y_AND_Z,
IIO_MOD_X_OR_Y,
IIO_MOD_X_OR_Z,
IIO_MOD_Y_OR_Z,
IIO_MOD_X_OR_Y_OR_Z,
IIO_MOD_LIGHT_BOTH,
IIO_MOD_LIGHT_IR,
IIO_MOD_ROOT_SUM_SQUARED_X_Y,
IIO_MOD_SUM_SQUARED_X_Y_Z,
IIO_MOD_LIGHT_CLEAR,
IIO_MOD_LIGHT_RED,
IIO_MOD_LIGHT_GREEN,
IIO_MOD_LIGHT_BLUE,
IIO_MOD_QUATERNION,
IIO_MOD_TEMP_AMBIENT,
IIO_MOD_TEMP_OBJECT,
IIO_MOD_NORTH_MAGN,
IIO_MOD_NORTH_TRUE,
IIO_MOD_NORTH_MAGN_TILT_COMP,
IIO_MOD_NORTH_TRUE_TILT_COMP,
IIO_MOD_RUNNING,
IIO_MOD_JOGGING,
IIO_MOD_WALKING,
IIO_MOD_STILL,
IIO_MOD_ROOT_SUM_SQUARED_X_Y_Z,
};
enum iio_event_type {
IIO_EV_TYPE_THRESH,
IIO_EV_TYPE_MAG,
IIO_EV_TYPE_ROC,
IIO_EV_TYPE_THRESH_ADAPTIVE,
IIO_EV_TYPE_MAG_ADAPTIVE,
IIO_EV_TYPE_CHANGE,
};
enum iio_event_direction {
IIO_EV_DIR_EITHER,
IIO_EV_DIR_RISING,
IIO_EV_DIR_FALLING,
IIO_EV_DIR_NONE,
};
//linux/iio/events.h
#if defined(MSYS) || defined(__APPLE__) || defined(__MACOSX__)
#define __USE_LINUX_IOCTL_DEFS
#include <sys/ioctl.h>
#else
#include <linux/ioctl.h>
#endif
#if defined(__APPLE__) || defined(__MACOSX__)
#include <osx/osx_endian.h>
#endif
/**
* struct iio_event_data - The actual event being pushed to userspace
* @id: event identifier
* @timestamp: best estimate of time of event occurrence (often from
* the interrupt handler)
*/
struct iio_event_data {
unsigned long long int id;
long long int timestamp;
};
#define IIO_GET_EVENT_FD_IOCTL _IOR('i', 0x90, int)
#define IIO_EVENT_CODE_EXTRACT_TYPE(mask) ((mask >> 56) & 0xFF)
#define IIO_EVENT_CODE_EXTRACT_DIR(mask) ((mask >> 48) & 0x7F)
#define IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(mask) ((mask >> 32) & 0xFF)
/* Event code number extraction depends on which type of event we have.
* Perhaps review this function in the future*/
#define IIO_EVENT_CODE_EXTRACT_CHAN(mask) ((short int)(mask & 0xFFFF))
#define IIO_EVENT_CODE_EXTRACT_CHAN2(mask) ((short int)(((mask) >> 16) & 0xFFFF))
#define IIO_EVENT_CODE_EXTRACT_MODIFIER(mask) ((mask >> 40) & 0xFF)
#define IIO_EVENT_CODE_EXTRACT_DIFF(mask) (((mask) >> 55) & 0x1)

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/*
* Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
/**
* @file
* @brief Pulse Width Modulation module
*
* PWM is the Pulse Width Modulation interface to libmraa. It allows the
* generation of a signal on a pin. Some boards may have higher or lower levels
* of resolution so make sure you check the board & pin you are using before
* hand.
*
* @snippet cycle-pwm3.c Interesting
*/
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include <fcntl.h>
#include "common.h"
typedef struct _pwm* mraa_pwm_context;
/**
* Initialise pwm_context, uses board mapping
*
* @param pin The PWM PIN
* @return pwm context or NULL
*/
mraa_pwm_context mraa_pwm_init(int pin);
/**
* Initialise pwm_context, raw mode
*
* @param chipid The chip inwhich the PWM is under in SYSFS
* @param pin The PWM PIN.
* @return pwm context or NULL
*/
mraa_pwm_context mraa_pwm_init_raw(int chipid, int pin);
/**
* Set the output duty-cycle percentage, as a float
*
* @param dev The Pwm context to use
* @param percentage A floating-point value representing percentage of output.
* The value should lie between 0.0f (representing on 0%) and 1.0f
* Values above or below this range will be set at either 0.0f or 1.0f
* @return Result of operation
*/
mraa_result_t mraa_pwm_write(mraa_pwm_context dev, float percentage);
/**
* Read the output duty-cycle percentage, as a float
*
* @param dev The Pwm context to use
* @return percentage A floating-point value representing percentage of output.
* The value should lie between 0.0f (representing on 0%) and 1.0f
* Values above or below this range will be set at either 0.0f or 1.0f
*/
float mraa_pwm_read(mraa_pwm_context dev);
/**
* Set the PWM period as seconds represented in a float
*
* @param dev The Pwm context to use
* @param seconds Period represented as a float in seconds
* @return Result of operation
*/
mraa_result_t mraa_pwm_period(mraa_pwm_context dev, float seconds);
/**
* Set period, milliseconds.
*
* @param dev The Pwm context to use
* @param ms Milliseconds for period
* @return Result of operation
*/
mraa_result_t mraa_pwm_period_ms(mraa_pwm_context dev, int ms);
/**
* Set period, microseconds
*
* @param dev The Pwm context to use
* @param us Microseconds as period
* @return Result of operation
*/
mraa_result_t mraa_pwm_period_us(mraa_pwm_context dev, int us);
/**
* Set pulsewidth, As represnted by seconds in a (float)
*
* @param dev The Pwm context to use
* @param seconds The duration of a pulse
* @return Result of operation
*/
mraa_result_t mraa_pwm_pulsewidth(mraa_pwm_context dev, float seconds);
/**
* Set pulsewidth, milliseconds
*
* @param dev The Pwm context to use
* @param ms Milliseconds for pulsewidth
* @return Result of operation
*/
mraa_result_t mraa_pwm_pulsewidth_ms(mraa_pwm_context dev, int ms);
/**
* Set pulsewidth, microseconds
*
* @param dev The Pwm context to use
* @param us Microseconds for pulsewidth
* @return Result of operation
*/
mraa_result_t mraa_pwm_pulsewidth_us(mraa_pwm_context dev, int us);
/**
* Set the enable status of the PWM pin. None zero will assume on with output being driven.
* and 0 will disable the output.
*
* @param dev The pwm context to use
* @param enable Toggle status of pin
* @return Result of operation.
*/
mraa_result_t mraa_pwm_enable(mraa_pwm_context dev, int enable);
/**
* Change ownership of context
*
* @param dev the context
* @param owner Ownership boolean
* @return Result of operation
*/
mraa_result_t mraa_pwm_owner(mraa_pwm_context dev, mraa_boolean_t owner);
/**
* Close and unexport the PWM pin
*
* @param dev The pwm context to use
* @return Result of operation
*/
mraa_result_t mraa_pwm_close(mraa_pwm_context dev);
/**
* Get the maximum pwm period in us
*
* @param dev The pwm context to use
* @return max pwm in us
*/
int mraa_pwm_get_max_period(mraa_pwm_context dev);
/**
* Get the minimum pwm period in us
*
* @param dev The pwm context to use
* @return min pwm in us
*/
int mraa_pwm_get_min_period(mraa_pwm_context dev);
#ifdef __cplusplus
}
#endif

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/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#include "pwm.h"
#include "types.hpp"
#include <stdexcept>
namespace mraa
{
/**
* @brief API to Pulse Width Modulation
*
* This file defines the PWM interface for libmraa
*
* @snippet Pwm3-cycle.cpp Interesting
*/
class Pwm
{
public:
/**
* instanciates a PWM object on a pin
*
* @param pin the pin number used on your board
* @param owner if you are the owner of the pin the destructor will
* unexport the pin from sysfs, default behaviour is you are the owner
* if the pinmapper exported it
* @param chipid the pwmchip to use, use only in raw mode
*/
Pwm(int pin, bool owner = true, int chipid = -1)
{
if (chipid == -1) {
m_pwm = mraa_pwm_init(pin);
} else {
m_pwm = mraa_pwm_init_raw(chipid, pin);
}
if (m_pwm == NULL) {
throw std::invalid_argument("Error initialising PWM on pin");
}
if (!owner) {
mraa_pwm_owner(m_pwm, 0);
}
}
/**
* Pwm constructor, takes a pointer to the PWM context and
* initialises the class
*
* @param void * to a PWM context
*/
Pwm(void* pwm_context)
{
m_pwm = (mraa_pwm_context) pwm_context;
if (m_pwm == NULL) {
throw std::invalid_argument("Invalid PWM context");
}
}
/**
* Pwm destructor
*/
~Pwm()
{
mraa_pwm_close(m_pwm);
}
/**
* Set the output duty-cycle percentage, as a float
*
* @param percentage A floating-point value representing percentage of
* output. The value should lie between 0.0f (representing 0%) and
* 1.0f Values above or below this range will be set at either 0.0f or
* 1.0f
* @return Result of operation
*/
Result
write(float percentage)
{
return (Result) mraa_pwm_write(m_pwm, percentage);
}
/**
* Read the output duty-cycle percentage, as a float
*
* @return A floating-point value representing percentage of
* output. The value should lie between 0.0f (representing 0%) and
* 1.0f Values above or below this range will be set at either 0.0f or
* 1.0f
*/
float
read()
{
return mraa_pwm_read(m_pwm);
}
/**
* Set the PWM period as seconds represented in a float
*
* @param period Period represented as a float in seconds
* @return Result of operation
*/
Result
period(float period)
{
return (Result) mraa_pwm_period(m_pwm, period);
}
/**
* Set period, milliseconds
*
* @param ms milliseconds for period
* @return Result of operation
*/
Result
period_ms(int ms)
{
return (Result) mraa_pwm_period_ms(m_pwm, ms);
}
/**
* Set period, microseconds
*
* @param us microseconds as period
* @return Result of operation
*/
Result
period_us(int us)
{
return (Result) mraa_pwm_period_us(m_pwm, us);
}
/**
* Set pulsewidth, as represented by seconds in a float
*
* @param seconds The duration of a pulse
* @return Result of operation
*/
Result
pulsewidth(float seconds)
{
return (Result) mraa_pwm_pulsewidth(m_pwm, seconds);
}
/**
* Set pulsewidth, milliseconds
*
* @param ms milliseconds for pulsewidth
* @return Result of operation
*/
Result
pulsewidth_ms(int ms)
{
return (Result) mraa_pwm_pulsewidth_ms(m_pwm, ms);
}
/**
* The pulsewidth, microseconds
*
* @param us microseconds for pulsewidth
* @return Result of operation
*/
Result
pulsewidth_us(int us)
{
return (Result) mraa_pwm_pulsewidth_us(m_pwm, us);
}
/**
* Set the enable status of the PWM pin. None zero will assume on with
* output being driven and 0 will disable the output
*
* @param enable enable status of pin
* @return Result of operation
*/
Result
enable(bool enable)
{
return (Result) mraa_pwm_enable(m_pwm, enable);
}
/**
* Get the maximum PWM period in us
*
* @return max PWM period in us
*/
int
max_period()
{
return mraa_pwm_get_max_period(m_pwm);
}
/**
* Get the minimum PWM period in us
*
* @return min PWM period in us
*/
int
min_period()
{
return mraa_pwm_get_min_period(m_pwm);
}
private:
mraa_pwm_context m_pwm;
};
}

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/*
* Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
/**
* @file
* @brief Serial Peripheral Interface
*
* This file defines the spi interface for libmraa. A Spi object in libmraa
* represents a spidev device. Linux spidev devices are created per spi bus and
* every chip select available on that bus has another spidev 'file'. A lot
* more information on spidev devices is available
* [here](https://www.kernel.org/doc/Documentation/spi/spidev).
*
* @snippet spi_mcp4261.c Interesting
*/
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include <fcntl.h>
#include <stdint.h>
#include "common.h"
/**
* MRAA SPI Modes
*/
typedef enum {
MRAA_SPI_MODE0 = 0, /**< CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge,
output data (change) on falling edge */
MRAA_SPI_MODE1 = 1, /**< CPOL = 0, CPHA = 1, Clock idle low, data is clocked in on falling edge,
output data (change) on rising edge */
MRAA_SPI_MODE2 = 2, /**< CPOL = 1, CPHA = 0, Clock idle low, data is clocked in on falling edge,
output data (change) on rising edge */
MRAA_SPI_MODE3 = 3, /**< CPOL = 1, CPHA = 1, Clock idle low, data is clocked in on rising, edge
output data (change) on falling edge */
} mraa_spi_mode_t;
/**
* Opaque pointer definition to the internal struct _spi
*/
typedef struct _spi* mraa_spi_context;
/**
* Initialise SPI_context, uses board mapping. Sets the muxes
*
* @param bus Bus to use, as listed in platform definition, normally 0
* @return Spi context or NULL
*/
mraa_spi_context mraa_spi_init(int bus);
/**
* Initialise SPI_context without any board configuration, selects a bus and a mux.
*
* @param bus Bus to use as listed by spidev
* @param cs Chip select to use as listed in spidev
* @return Spi context or NULL
*/
mraa_spi_context mraa_spi_init_raw(unsigned int bus, unsigned int cs);
/**
* Set the SPI device mode. see spidev 0-3.
*
* @param dev The Spi context
* @param mode The SPI mode, See Linux spidev
* @return Result of operation
*/
mraa_result_t mraa_spi_mode(mraa_spi_context dev, mraa_spi_mode_t mode);
/**
* Set the SPI device operating clock frequency.
*
* @param dev the Spi context
* @param hz the frequency in hz
* @return Result of operation
*/
mraa_result_t mraa_spi_frequency(mraa_spi_context dev, int hz);
/**
* Write Single Byte to the SPI device.
*
* @param dev The Spi context
* @param data Data to send
* @return Data received on the miso line or -1 in case of error
*/
int mraa_spi_write(mraa_spi_context dev, uint8_t data);
/**
* Write Two Bytes to the SPI device.
*
* @param dev The Spi context
* @param data Data to send
* @return Data received on the miso line
*/
int mraa_spi_write_word(mraa_spi_context dev, uint16_t data);
/**
* Write Buffer of bytes to the SPI device. The pointer return has to be
* free'd by the caller. It will return a NULL pointer in cases of error.
*
* @param dev The Spi context
* @param data to send
* @param length elements within buffer, Max 4096
* @return Data received on the miso line, same length as passed in
*/
uint8_t* mraa_spi_write_buf(mraa_spi_context dev, uint8_t* data, int length);
/**
* Write Buffer of uint16 to the SPI device. The pointer return has to be
* free'd by the caller. It will return a NULL pointer in cases of error.
*
* @param dev The Spi context
* @param data to send
* @param length elements (in bytes) within buffer, Max 4096
* @return Data received on the miso line, same length as passed in
*/
uint16_t* mraa_spi_write_buf_word(mraa_spi_context dev, uint16_t* data, int length);
/**
* Transfer Buffer of bytes to the SPI device. Both send and recv buffers
* are passed in
*
* @param dev The Spi context
* @param data to send
* @param rxbuf buffer to recv data back, may be NULL
* @param length elements within buffer, Max 4096
* @return Result of operation
*/
mraa_result_t mraa_spi_transfer_buf(mraa_spi_context dev, uint8_t* data, uint8_t* rxbuf, int length);
/**
* Transfer Buffer of uint16 to the SPI device. Both send and recv buffers
* are passed in
*
* @param dev The Spi context
* @param data to send
* @param rxbuf buffer to recv data back, may be NULL
* @param length elements (in bytes) within buffer, Max 4096
* @return Result of operation
*/
mraa_result_t mraa_spi_transfer_buf_word(mraa_spi_context dev, uint16_t* data, uint16_t* rxbuf, int length);
/**
* Change the SPI lsb mode
*
* @param dev The Spi context
* @param lsb Use least significant bit transmission. 0 for msbi
* @return Result of operation
*/
mraa_result_t mraa_spi_lsbmode(mraa_spi_context dev, mraa_boolean_t lsb);
/**
* Set bits per mode on transaction, defaults at 8
*
* @param dev The Spi context
* @param bits bits per word
* @return Result of operation
*/
mraa_result_t mraa_spi_bit_per_word(mraa_spi_context dev, unsigned int bits);
/**
* De-inits an mraa_spi_context device
*
* @param dev The Spi context
* @return Result of operation
*/
mraa_result_t mraa_spi_stop(mraa_spi_context dev);
#ifdef __cplusplus
}
#endif

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/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright (c) 2014 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#include "spi.h"
#include "types.hpp"
#include <stdexcept>
namespace mraa
{
/**
* MRAA SPI Modes
*/
typedef enum {
SPI_MODE0 = 0, /**< CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge,
output data (change) on falling edge */
SPI_MODE1 = 1, /**< CPOL = 0, CPHA = 1, Clock idle low, data is clocked in on falling edge,
output data (change) on rising edge */
SPI_MODE2 = 2, /**< CPOL = 1, CPHA = 0, Clock idle low, data is clocked in on falling edge,
output data (change) on rising edge */
SPI_MODE3 = 3, /**< CPOL = 1, CPHA = 1, Clock idle low, data is clocked in on rising, edge
output data (change) on falling edge */
} Spi_Mode;
/**
* @brief API to Serial Peripheral Interface
*
* This file defines the SPI interface for libmraa
*
* @snippet Spi-pot.cpp Interesting
*/
class Spi
{
public:
/**
* Initialise SPI object using the board mapping to set muxes
*
* @param bus to use, as listed in the platform definition, normally 0
*/
Spi(int bus)
{
m_spi = mraa_spi_init(bus);
if (m_spi == NULL) {
throw std::invalid_argument("Error initialising SPI bus");
}
}
Spi(int bus, int cs)
{
m_spi = mraa_spi_init_raw(bus, cs);
if (m_spi == NULL) {
throw std::invalid_argument("Error initialising SPI bus");
}
}
/**
* Spi Constructor, takes a pointer to a SPI context and initialises
* the SPI class
*
* @param void * to SPI context
*/
Spi(void* spi_context)
{
m_spi = (mraa_spi_context) spi_context;
if (m_spi == NULL) {
throw std::invalid_argument("Invalid SPI context");
}
}
/**
* Closes spi bus
*/
~Spi()
{
mraa_spi_stop(m_spi);
}
/**
* Set the SPI device mode. see spidev0-3
*
* @param mode the mode. See Linux spidev doc
* @return Result of operation
*/
Result
mode(Spi_Mode mode)
{
return (Result) mraa_spi_mode(m_spi, (mraa_spi_mode_t) mode);
}
/**
* Set the SPI device operating clock frequency
*
* @param hz the frequency to set in hz
* @return Result of operation
*/
Result
frequency(int hz)
{
return (Result) mraa_spi_frequency(m_spi, hz);
}
/**
* Write single byte to the SPI device
*
* @param data the byte to send
* @return data received on the miso line or -1 in case of error
*/
int
writeByte(uint8_t data)
{
return mraa_spi_write(m_spi, (uint8_t) data);
}
/**
* Write single byte to the SPI device
*
* @param data the byte to send
* @return data received on the miso line or -1 in case of error
*/
int
writeWord(uint16_t data)
{
return mraa_spi_write_word(m_spi, (uint16_t) data);
}
/**
* Write buffer of bytes to SPI device The pointer return has to be
* free'd by the caller. It will return a NULL pointer in cases of
* error
*
* @param txBuf buffer to send
* @param length size of buffer to send
* @return uint8_t* data received on the miso line. Same length as passed in
*/
uint8_t*
write(uint8_t* txBuf, int length)
{
return mraa_spi_write_buf(m_spi, txBuf, length);
}
#ifndef SWIG
/**
* Write buffer of bytes to SPI device The pointer return has to be
* free'd by the caller. It will return a NULL pointer in cases of
* error
*
* @param txBuf buffer to send
* @param length size of buffer (in bytes) to send
* @return uint8_t* data received on the miso line. Same length as passed in
*/
uint16_t*
writeWord(uint16_t* txBuf, int length)
{
return mraa_spi_write_buf_word(m_spi, txBuf, length);
}
#endif
#ifndef SWIG
/**
* Transfer data to and from SPI device Receive pointer may be null if
* return data is not needed.
*
* @param txBuf buffer to send
* @param rxBuf buffer to optionally receive data from spi device
* @param length size of buffer to send
* @return Result of operation
*/
Result
transfer(uint8_t* txBuf, uint8_t* rxBuf, int length)
{
return (Result) mraa_spi_transfer_buf(m_spi, txBuf, rxBuf, length);
}
/**
* Transfer data to and from SPI device Receive pointer may be null if
* return data is not needed.
*
* @param txBuf buffer to send
* @param rxBuf buffer to optionally receive data from spi device
* @param length size of buffer to send
* @return Result of operation
*/
Result
transfer_word(uint16_t* txBuf, uint16_t* rxBuf, int length)
{
return (Result) mraa_spi_transfer_buf_word(m_spi, txBuf, rxBuf, length);
}
#endif
/**
* Change the SPI lsb mode
*
* @param lsb Use least significant bit transmission - 0 for msbi
* @return Result of operation
*/
Result
lsbmode(bool lsb)
{
return (Result) mraa_spi_lsbmode(m_spi, (mraa_boolean_t) lsb);
}
/**
* Set bits per mode on transaction, default is 8
*
* @param bits bits per word
* @return Result of operation
*/
Result
bitPerWord(unsigned int bits)
{
return (Result) mraa_spi_bit_per_word(m_spi, bits);
}
private:
mraa_spi_context m_spi;
};
}

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/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright © 2014 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#pragma once
/** @file
*
* This file defines the basic shared types for libmraa
* this file is different to common.h in that swig takes this as an input
*/
#ifdef __cplusplus
extern "C" {
#endif
/**
* MRAA supported platform types
*/
typedef enum {
MRAA_INTEL_GALILEO_GEN1 = 0, /**< The Generation 1 Galileo platform (RevD) */
MRAA_INTEL_GALILEO_GEN2 = 1, /**< The Generation 2 Galileo platform (RevG/H) */
MRAA_INTEL_EDISON_FAB_C = 2, /**< The Intel Edison (FAB C) */
MRAA_INTEL_DE3815 = 3, /**< The Intel DE3815 Baytrail NUC */
MRAA_INTEL_MINNOWBOARD_MAX = 4, /**< The Intel Minnow Board Max */
MRAA_RASPBERRY_PI = 5, /**< The different Raspberry PI Models -like A,B,A+,B+ */
MRAA_BEAGLEBONE = 6, /**< The different BeagleBone Black Modes B/C */
MRAA_BANANA = 7, /**< Allwinner A20 based Banana Pi and Banana Pro */
MRAA_INTEL_NUC5 = 8, /**< The Intel 5th generations Broadwell NUCs */
MRAA_96BOARDS = 9, /**< Linaro 96boards */
MRAA_INTEL_SOFIA_3GR = 10, /**< The Intel SoFIA 3GR */
MRAA_INTEL_CHERRYHILLS = 11, /**< The Intel Braswell Cherryhills */
MRAA_UP = 12, /**< The UP Board */
MRAA_INTEL_GT_TUCHUCK = 13, /**< The Intel GT Tuchuck Board */
// USB platform extenders start at 256
MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
// contains bit 9 so is subplatform
MRAA_GENERIC_FIRMATA = 1280, /**< Firmata uart platform/bridge */
MRAA_MOCK_PLATFORM = 96, /**< Mock platform, which requires no real hardware */
MRAA_NULL_PLATFORM = 98, /**< Platform with no capabilities that hosts a sub platform */
MRAA_UNKNOWN_PLATFORM =
99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */
} mraa_platform_t;
/**
* Intel edison miniboard numbering enum
*/
typedef enum {
MRAA_INTEL_EDISON_MINIBOARD_J17_1 = 0,
MRAA_INTEL_EDISON_MINIBOARD_J17_5 = 4,
MRAA_INTEL_EDISON_MINIBOARD_J17_7 = 6,
MRAA_INTEL_EDISON_MINIBOARD_J17_8 = 7,
MRAA_INTEL_EDISON_MINIBOARD_J17_9 = 8,
MRAA_INTEL_EDISON_MINIBOARD_J17_10 = 9,
MRAA_INTEL_EDISON_MINIBOARD_J17_11 = 10,
MRAA_INTEL_EDISON_MINIBOARD_J17_12 = 11,
MRAA_INTEL_EDISON_MINIBOARD_J17_14 = 13,
MRAA_INTEL_EDISON_MINIBOARD_J18_1 = 14,
MRAA_INTEL_EDISON_MINIBOARD_J18_2 = 15,
MRAA_INTEL_EDISON_MINIBOARD_J18_6 = 19,
MRAA_INTEL_EDISON_MINIBOARD_J18_7 = 20,
MRAA_INTEL_EDISON_MINIBOARD_J18_8 = 21,
MRAA_INTEL_EDISON_MINIBOARD_J18_10 = 23,
MRAA_INTEL_EDISON_MINIBOARD_J18_11 = 24,
MRAA_INTEL_EDISON_MINIBOARD_J18_12 = 25,
MRAA_INTEL_EDISON_MINIBOARD_J18_13 = 26,
MRAA_INTEL_EDISON_MINIBOARD_J19_4 = 31,
MRAA_INTEL_EDISON_MINIBOARD_J19_5 = 32,
MRAA_INTEL_EDISON_MINIBOARD_J19_6 = 33,
MRAA_INTEL_EDISON_MINIBOARD_J19_8 = 35,
MRAA_INTEL_EDISON_MINIBOARD_J19_9 = 36,
MRAA_INTEL_EDISON_MINIBOARD_J19_10 = 37,
MRAA_INTEL_EDISON_MINIBOARD_J19_11 = 38,
MRAA_INTEL_EDISON_MINIBOARD_J19_12 = 39,
MRAA_INTEL_EDISON_MINIBOARD_J19_13 = 40,
MRAA_INTEL_EDISON_MINIBOARD_J19_14 = 41,
MRAA_INTEL_EDISON_MINIBOARD_J20_3 = 44,
MRAA_INTEL_EDISON_MINIBOARD_J20_4 = 45,
MRAA_INTEL_EDISON_MINIBOARD_J20_5 = 46,
MRAA_INTEL_EDISON_MINIBOARD_J20_6 = 47,
MRAA_INTEL_EDISON_MINIBOARD_J20_7 = 48,
MRAA_INTEL_EDISON_MINIBOARD_J20_8 = 49,
MRAA_INTEL_EDISON_MINIBOARD_J20_9 = 50,
MRAA_INTEL_EDISON_MINIBOARD_J20_10 = 51,
MRAA_INTEL_EDISON_MINIBOARD_J20_11 = 52,
MRAA_INTEL_EDISON_MINIBOARD_J20_12 = 53,
MRAA_INTEL_EDISON_MINIBOARD_J20_13 = 54,
MRAA_INTEL_EDISON_MINIBOARD_J20_14 = 55
} mraa_intel_edison_miniboard_t;
/**
* Intel Edison raw GPIO numbering enum
*/
typedef enum {
MRAA_INTEL_EDISON_GP182 = 0,
MRAA_INTEL_EDISON_GP135 = 4,
MRAA_INTEL_EDISON_GP27 = 6,
MRAA_INTEL_EDISON_GP20 = 7,
MRAA_INTEL_EDISON_GP28 = 8,
MRAA_INTEL_EDISON_GP111 = 0,
MRAA_INTEL_EDISON_GP109 = 10,
MRAA_INTEL_EDISON_GP115 = 11,
MRAA_INTEL_EDISON_GP128 = 13,
MRAA_INTEL_EDISON_GP13 = 14,
MRAA_INTEL_EDISON_GP165 = 15,
MRAA_INTEL_EDISON_GP19 = 19,
MRAA_INTEL_EDISON_GP12 = 20,
MRAA_INTEL_EDISON_GP183 = 21,
MRAA_INTEL_EDISON_GP110 = 23,
MRAA_INTEL_EDISON_GP114 = 24,
MRAA_INTEL_EDISON_GP129 = 25,
MRAA_INTEL_EDISON_GP130 = 26,
MRAA_INTEL_EDISON_GP44 = 31,
MRAA_INTEL_EDISON_GP46 = 32,
MRAA_INTEL_EDISON_GP48 = 33,
MRAA_INTEL_EDISON_GP131 = 35,
MRAA_INTEL_EDISON_GP14 = 36,
MRAA_INTEL_EDISON_GP40 = 37,
MRAA_INTEL_EDISON_GP43 = 38,
MRAA_INTEL_EDISON_GP77 = 39,
MRAA_INTEL_EDISON_GP82 = 40,
MRAA_INTEL_EDISON_GP83 = 41,
MRAA_INTEL_EDISON_GP134 = 44,
MRAA_INTEL_EDISON_GP45 = 45,
MRAA_INTEL_EDISON_GP47 = 46,
MRAA_INTEL_EDISON_GP49 = 47,
MRAA_INTEL_EDISON_GP15 = 48,
MRAA_INTEL_EDISON_GP84 = 49,
MRAA_INTEL_EDISON_GP42 = 50,
MRAA_INTEL_EDISON_GP41 = 51,
MRAA_INTEL_EDISON_GP78 = 52,
MRAA_INTEL_EDISON_GP79 = 53,
MRAA_INTEL_EDISON_GP80 = 54,
MRAA_INTEL_EDISON_GP81 = 55
} mraa_intel_edison_t;
/**
* Raspberry PI Wiring compatible numbering enum
*/
typedef enum {
MRAA_RASPBERRY_WIRING_PIN8 = 3,
MRAA_RASPBERRY_WIRING_PIN9 = 5,
MRAA_RASPBERRY_WIRING_PIN7 = 7,
MRAA_RASPBERRY_WIRING_PIN15 = 8,
MRAA_RASPBERRY_WIRING_PIN16 = 10,
MRAA_RASPBERRY_WIRING_PIN0 = 11,
MRAA_RASPBERRY_WIRING_PIN1 = 12,
MRAA_RASPBERRY_WIRING_PIN2 = 13,
MRAA_RASPBERRY_WIRING_PIN3 = 15,
MRAA_RASPBERRY_WIRING_PIN4 = 16,
MRAA_RASPBERRY_WIRING_PIN5 = 18,
MRAA_RASPBERRY_WIRING_PIN12 = 19,
MRAA_RASPBERRY_WIRING_PIN13 = 21,
MRAA_RASPBERRY_WIRING_PIN6 = 22,
MRAA_RASPBERRY_WIRING_PIN14 = 23,
MRAA_RASPBERRY_WIRING_PIN10 = 24,
MRAA_RASPBERRY_WIRING_PIN11 = 26,
MRAA_RASPBERRY_WIRING_PIN17 = 29, // RPi B V2
MRAA_RASPBERRY_WIRING_PIN21 = 29,
MRAA_RASPBERRY_WIRING_PIN18 = 30, // RPi B V2
MRAA_RASPBERRY_WIRING_PIN19 = 31, // RPI B V2
MRAA_RASPBERRY_WIRING_PIN22 = 31,
MRAA_RASPBERRY_WIRING_PIN20 = 32, // RPi B V2
MRAA_RASPBERRY_WIRING_PIN26 = 32,
MRAA_RASPBERRY_WIRING_PIN23 = 33,
MRAA_RASPBERRY_WIRING_PIN24 = 35,
MRAA_RASPBERRY_WIRING_PIN27 = 36,
MRAA_RASPBERRY_WIRING_PIN25 = 37,
MRAA_RASPBERRY_WIRING_PIN28 = 38,
MRAA_RASPBERRY_WIRING_PIN29 = 40
} mraa_raspberry_wiring_t;
/**
* MRAA return codes
*/
typedef enum {
MRAA_SUCCESS = 0, /**< Expected response */
MRAA_ERROR_FEATURE_NOT_IMPLEMENTED = 1, /**< Feature TODO */
MRAA_ERROR_FEATURE_NOT_SUPPORTED = 2, /**< Feature not supported by HW */
MRAA_ERROR_INVALID_VERBOSITY_LEVEL = 3, /**< Verbosity level wrong */
MRAA_ERROR_INVALID_PARAMETER = 4, /**< Parameter invalid */
MRAA_ERROR_INVALID_HANDLE = 5, /**< Handle invalid */
MRAA_ERROR_NO_RESOURCES = 6, /**< No resource of that type avail */
MRAA_ERROR_INVALID_RESOURCE = 7, /**< Resource invalid */
MRAA_ERROR_INVALID_QUEUE_TYPE = 8, /**< Queue type incorrect */
MRAA_ERROR_NO_DATA_AVAILABLE = 9, /**< No data available */
MRAA_ERROR_INVALID_PLATFORM = 10, /**< Platform not recognised */
MRAA_ERROR_PLATFORM_NOT_INITIALISED = 11, /**< Board information not initialised */
MRAA_ERROR_UART_OW_SHORTED = 12, /**< UART OW Short Circuit Detected*/
MRAA_ERROR_UART_OW_NO_DEVICES = 13, /**< UART OW No devices detected */
MRAA_ERROR_UART_OW_DATA_ERROR = 14, /**< UART OW Data/Bus error detected */
MRAA_ERROR_UNSPECIFIED = 99 /**< Unknown Error */
} mraa_result_t;
/**
* Enum representing different possible modes for a pin.
*/
typedef enum {
MRAA_PIN_VALID = 0, /**< Pin Valid */
MRAA_PIN_GPIO = 1, /**< General Purpose IO */
MRAA_PIN_PWM = 2, /**< Pulse Width Modulation */
MRAA_PIN_FAST_GPIO = 3, /**< Faster GPIO */
MRAA_PIN_SPI = 4, /**< SPI */
MRAA_PIN_I2C = 5, /**< I2C */
MRAA_PIN_AIO = 6, /**< Analog in */
MRAA_PIN_UART = 7 /**< UART */
} mraa_pinmodes_t;
/**
* Enum reprensenting different i2c speeds/modes
*/
typedef enum {
MRAA_I2C_STD = 0, /**< up to 100Khz */
MRAA_I2C_FAST = 1, /**< up to 400Khz */
MRAA_I2C_HIGH = 2 /**< up to 3.4Mhz */
} mraa_i2c_mode_t;
typedef enum {
MRAA_UART_PARITY_NONE = 0,
MRAA_UART_PARITY_EVEN = 1,
MRAA_UART_PARITY_ODD = 2,
MRAA_UART_PARITY_MARK = 3,
MRAA_UART_PARITY_SPACE = 4
} mraa_uart_parity_t;
#ifdef __cplusplus
}
#endif

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/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright © 2014 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#pragma once
/** @file
*
* This file defines the basic shared types for libmraa
* this file is different to common.h in that swig takes this as an input
*/
namespace mraa
{
//These enums must match the enums in types.h
/**
* MRAA supported platform types
*/
typedef enum {
INTEL_GALILEO_GEN1 = 0, /**< The Generation 1 Galileo platform (RevD) */
INTEL_GALILEO_GEN2 = 1, /**< The Generation 2 Galileo platform (RevG/H) */
INTEL_EDISON_FAB_C = 2, /**< The Intel Edison (FAB C) */
INTEL_DE3815 = 3, /**< The Intel DE3815 Baytrail NUC */
INTEL_MINNOWBOARD_MAX = 4, /**< The Intel Minnow Board Max */
RASPBERRY_PI = 5, /**< The different Raspberry PI Models -like A,B,A+,B+ */
BEAGLEBONE = 6, /**< The different BeagleBone Black Modes B/C */
BANANA = 7, /**< Allwinner A20 based Banana Pi and Banana Pro */
INTEL_NUC5 = 8, /**< The Intel 5th generations Broadwell NUCs */
A96BOARDS = 9, /**< Linaro 96boards, A prefix for 'ARM' since not allowed numerical */
INTEL_SOFIA_3GR = 10, /**< The Intel SoFIA 3GR */
INTEL_CHERRYHILLS = 11, /**< The Intel Braswell Cherryhills */
INTEL_UP = 12, /**< The UP Board */
INTEL_GT_TUCHUCK = 13, /**< The Intel GT Board */
FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
GENERIC_FIRMATA = 1280, /**< Firmata uart platform/bridge */
NULL_PLATFORM = 98,
UNKNOWN_PLATFORM =
99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */
} Platform;
/**
* Intel edison miniboard numbering enum
*/
typedef enum {
INTEL_EDISON_MINIBOARD_J17_1 = 0,
INTEL_EDISON_MINIBOARD_J17_5 = 4,
INTEL_EDISON_MINIBOARD_J17_7 = 6,
INTEL_EDISON_MINIBOARD_J17_8 = 7,
INTEL_EDISON_MINIBOARD_J17_9 = 8,
INTEL_EDISON_MINIBOARD_J17_10 = 9,
INTEL_EDISON_MINIBOARD_J17_11 = 10,
INTEL_EDISON_MINIBOARD_J17_12 = 11,
INTEL_EDISON_MINIBOARD_J17_14 = 13,
INTEL_EDISON_MINIBOARD_J18_1 = 14,
INTEL_EDISON_MINIBOARD_J18_2 = 15,
INTEL_EDISON_MINIBOARD_J18_6 = 19,
INTEL_EDISON_MINIBOARD_J18_7 = 20,
INTEL_EDISON_MINIBOARD_J18_8 = 21,
INTEL_EDISON_MINIBOARD_J18_10 = 23,
INTEL_EDISON_MINIBOARD_J18_11 = 24,
INTEL_EDISON_MINIBOARD_J18_12 = 25,
INTEL_EDISON_MINIBOARD_J18_13 = 26,
INTEL_EDISON_MINIBOARD_J19_4 = 31,
INTEL_EDISON_MINIBOARD_J19_5 = 32,
INTEL_EDISON_MINIBOARD_J19_6 = 33,
INTEL_EDISON_MINIBOARD_J19_8 = 35,
INTEL_EDISON_MINIBOARD_J19_9 = 36,
INTEL_EDISON_MINIBOARD_J19_10 = 37,
INTEL_EDISON_MINIBOARD_J19_11 = 38,
INTEL_EDISON_MINIBOARD_J19_12 = 39,
INTEL_EDISON_MINIBOARD_J19_13 = 40,
INTEL_EDISON_MINIBOARD_J19_14 = 41,
INTEL_EDISON_MINIBOARD_J20_3 = 44,
INTEL_EDISON_MINIBOARD_J20_4 = 45,
INTEL_EDISON_MINIBOARD_J20_5 = 46,
INTEL_EDISON_MINIBOARD_J20_6 = 47,
INTEL_EDISON_MINIBOARD_J20_7 = 48,
INTEL_EDISON_MINIBOARD_J20_8 = 49,
INTEL_EDISON_MINIBOARD_J20_9 = 50,
INTEL_EDISON_MINIBOARD_J20_10 = 51,
INTEL_EDISON_MINIBOARD_J20_11 = 52,
INTEL_EDISON_MINIBOARD_J20_12 = 53,
INTEL_EDISON_MINIBOARD_J20_13 = 54,
INTEL_EDISON_MINIBOARD_J20_14 = 55
} IntelEdisonMiniboard;
/**
* Intel Edison raw GPIO numbering enum
*/
typedef enum {
INTEL_EDISON_GP182 = 0,
INTEL_EDISON_GP135 = 4,
INTEL_EDISON_GP27 = 6,
INTEL_EDISON_GP20 = 7,
INTEL_EDISON_GP28 = 8,
INTEL_EDISON_GP111 = 0,
INTEL_EDISON_GP109 = 10,
INTEL_EDISON_GP115 = 11,
INTEL_EDISON_GP128 = 13,
INTEL_EDISON_GP13 = 14,
INTEL_EDISON_GP165 = 15,
INTEL_EDISON_GP19 = 19,
INTEL_EDISON_GP12 = 20,
INTEL_EDISON_GP183 = 21,
INTEL_EDISON_GP110 = 23,
INTEL_EDISON_GP114 = 24,
INTEL_EDISON_GP129 = 25,
INTEL_EDISON_GP130 = 26,
INTEL_EDISON_GP44 = 31,
INTEL_EDISON_GP46 = 32,
INTEL_EDISON_GP48 = 33,
INTEL_EDISON_GP131 = 35,
INTEL_EDISON_GP14 = 36,
INTEL_EDISON_GP40 = 37,
INTEL_EDISON_GP43 = 38,
INTEL_EDISON_GP77 = 39,
INTEL_EDISON_GP82 = 40,
INTEL_EDISON_GP83 = 41,
INTEL_EDISON_GP134 = 44,
INTEL_EDISON_GP45 = 45,
INTEL_EDISON_GP47 = 46,
INTEL_EDISON_GP49 = 47,
INTEL_EDISON_GP15 = 48,
INTEL_EDISON_GP84 = 49,
INTEL_EDISON_GP42 = 50,
INTEL_EDISON_GP41 = 51,
INTEL_EDISON_GP78 = 52,
INTEL_EDISON_GP79 = 53,
INTEL_EDISON_GP80 = 54,
INTEL_EDISON_GP81 = 55
} IntelEdison;
/**
* Raspberry PI Wiring compatible numbering enum
*/
typedef enum {
RASPBERRY_WIRING_PIN8 = 3,
RASPBERRY_WIRING_PIN9 = 5,
RASPBERRY_WIRING_PIN7 = 7,
RASPBERRY_WIRING_PIN15 = 8,
RASPBERRY_WIRING_PIN16 = 10,
RASPBERRY_WIRING_PIN0 = 11,
RASPBERRY_WIRING_PIN1 = 12,
RASPBERRY_WIRING_PIN2 = 13,
RASPBERRY_WIRING_PIN3 = 15,
RASPBERRY_WIRING_PIN4 = 16,
RASPBERRY_WIRING_PIN5 = 18,
RASPBERRY_WIRING_PIN12 = 19,
RASPBERRY_WIRING_PIN13 = 21,
RASPBERRY_WIRING_PIN6 = 22,
RASPBERRY_WIRING_PIN14 = 23,
RASPBERRY_WIRING_PIN10 = 24,
RASPBERRY_WIRING_PIN11 = 26,
RASPBERRY_WIRING_PIN17 = 29, // RPi B V2
RASPBERRY_WIRING_PIN21 = 29,
RASPBERRY_WIRING_PIN18 = 30, // RPi B V2
RASPBERRY_WIRING_PIN19 = 31, // RPI B V2
RASPBERRY_WIRING_PIN22 = 31,
RASPBERRY_WIRING_PIN20 = 32, // RPi B V2
RASPBERRY_WIRING_PIN26 = 32,
RASPBERRY_WIRING_PIN23 = 33,
RASPBERRY_WIRING_PIN24 = 35,
RASPBERRY_WIRING_PIN27 = 36,
RASPBERRY_WIRING_PIN25 = 37,
RASPBERRY_WIRING_PIN28 = 38,
RASPBERRY_WIRING_PIN29 = 40
} RaspberryWiring;
/**
* MRAA return codes
*/
typedef enum {
SUCCESS = 0, /**< Expected response */
ERROR_FEATURE_NOT_IMPLEMENTED = 1, /**< Feature TODO */
ERROR_FEATURE_NOT_SUPPORTED = 2, /**< Feature not supported by HW */
ERROR_INVALID_VERBOSITY_LEVEL = 3, /**< Verbosity level wrong */
ERROR_INVALID_PARAMETER = 4, /**< Parameter invalid */
ERROR_INVALID_HANDLE = 5, /**< Handle invalid */
ERROR_NO_RESOURCES = 6, /**< No resource of that type avail */
ERROR_INVALID_RESOURCE = 7, /**< Resource invalid */
ERROR_INVALID_QUEUE_TYPE = 8, /**< Queue type incorrect */
ERROR_NO_DATA_AVAILABLE = 9, /**< No data available */
ERROR_INVALID_PLATFORM = 10, /**< Platform not recognised */
ERROR_PLATFORM_NOT_INITIALISED = 11, /**< Board information not initialised */
ERROR_UART_OW_SHORTED = 12, /**< UART OW Short Circuit Detected*/
ERROR_UART_OW_NO_DEVICES = 13, /**< UART OW No devices detected */
ERROR_UART_OW_DATA_ERROR = 14, /**< UART OW Data/Bus error detected */
ERROR_UNSPECIFIED = 99 /**< Unknown Error */
} Result;
/**
* Enum representing different possible modes for a pin.
*/
typedef enum {
PIN_VALID = 0, /**< Pin Valid */
PIN_GPIO = 1, /**< General Purpose IO */
PIN_PWM = 2, /**< Pulse Width Modulation */
PIN_FAST_GPIO = 3, /**< Faster GPIO */
PIN_SPI = 4, /**< SPI */
PIN_I2C = 5, /**< I2C */
PIN_AIO = 6, /**< Analog in */
PIN_UART = 7 /**< UART */
} Pinmodes;
/**
* Enum reprensenting different i2c speeds/modes
*/
typedef enum {
I2C_STD = 0, /**< up to 100Khz */
I2C_FAST = 1, /**< up to 400Khz */
I2C_HIGH = 2 /**< up to 3.4Mhz */
} I2cMode;
typedef enum {
UART_PARITY_NONE = 0,
UART_PARITY_EVEN = 1,
UART_PARITY_ODD = 2,
UART_PARITY_MARK = 3,
UART_PARITY_SPACE = 4
} UartParity;
}

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/*
* Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
* Contributions: Jon Trulson <jtrulson@ics.com>
* Brendan Le Foll <brendan.le.foll@intel.com>
* Copyright (c) 2014 - 2015 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
/**
* @file
* @brief UART module
*
* UART is the Universal asynchronous receiver/transmitter interface to
* libmraa. It allows the exposure of UART pins on supported boards.
* With functionality to expand at a later date.
*
* @snippet uart.c Interesting
*/
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include "common.h"
typedef struct _uart* mraa_uart_context;
/**
* Initialise uart_context, uses board mapping
*
* @param uart the index of the uart set to use
* @return uart context or NULL
*/
mraa_uart_context mraa_uart_init(int uart);
/**
* Initialise a raw uart_context. No board setup.
*
* @param path for example "/dev/ttyS0"
* @return uart context or NULL
*/
mraa_uart_context mraa_uart_init_raw(const char* path);
/**
* Flush the outbound data.
* Blocks until complete.
*
* @param dev The UART context
* @return Result of operation
*/
mraa_result_t mraa_uart_flush(mraa_uart_context dev);
/**
* Set the baudrate.
* Takes an int and will attempt to decide what baudrate is
* to be used on the UART hardware.
*
* @param dev The UART context
* @param baud unsigned int of baudrate i.e. 9600
* @return Result of operation
*/
mraa_result_t mraa_uart_set_baudrate(mraa_uart_context dev, unsigned int baud);
/**
* Set the transfer mode
* For example setting the mode to 8N1 would be
* "mraa_uart_set_mode(dev, 8,MRAA_UART_PARITY_NONE , 1)"
*
* @param dev The UART context
* @param bytesize data bits
* @param parity Parity bit setting
* @param stopbits stop bits
* @return Result of operation
*/
mraa_result_t mraa_uart_set_mode(mraa_uart_context dev, int bytesize, mraa_uart_parity_t parity, int stopbits);
/**
* Set the flowcontrol
*
* @param dev The UART context
* @param xonxoff XON/XOFF Software flow control.
* @param rtscts RTS/CTS out of band hardware flow control
* @return Result of operation
*/
mraa_result_t mraa_uart_set_flowcontrol(mraa_uart_context dev, mraa_boolean_t xonxoff, mraa_boolean_t rtscts);
/**
* Set the timeout for read and write operations
* <= 0 will disable that timeout
*
* @param dev The UART context
* @param read read timeout
* @param write write timeout
* @param interchar inbetween char timeout
* @return Result of operation
*/
mraa_result_t mraa_uart_set_timeout(mraa_uart_context dev, int read, int write, int interchar);
/**
* Set the blocking state for write operations
*
* @param dev The UART context
* @param nonblock new nonblocking state
* @return Result of operation
*/
mraa_result_t mraa_uart_set_non_blocking(mraa_uart_context dev, mraa_boolean_t nonblock);
/**
* Get Char pointer with tty device path within Linux
* For example. Could point to "/dev/ttyS0"
*
* @param dev uart context
* @return char pointer of device path
*/
const char* mraa_uart_get_dev_path(mraa_uart_context dev);
/**
* Destroy a mraa_uart_context
*
* @param dev uart context
* @return mraa_result_t
*/
mraa_result_t mraa_uart_stop(mraa_uart_context dev);
/**
* Read bytes from the device into a buffer
*
* @param dev uart context
* @param buf buffer pointer
* @param length maximum size of buffer
* @return the number of bytes read, or -1 if an error occurred
*/
int mraa_uart_read(mraa_uart_context dev, char* buf, size_t length);
/**
* Write bytes in buffer to a device
*
* @param dev uart context
* @param buf buffer pointer
* @param length maximum size of buffer
* @return the number of bytes written, or -1 if an error occurred
*/
int mraa_uart_write(mraa_uart_context dev, const char* buf, size_t length);
/**
* Check to see if data is available on the device for reading
*
* @param dev uart context
* @param millis number of milliseconds to wait, or 0 to return immediately
* @return 1 if there is data available to read, 0 otherwise
*/
mraa_boolean_t mraa_uart_data_available(mraa_uart_context dev, unsigned int millis);
#ifdef __cplusplus
}
#endif

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/*
* Author: Brendan Le Foll <brendan.le.foll@intel.com>
* Contributions: Jon Trulson <jtrulson@ics.com>
* Contributions: Thomas Ingleby <thomas.c.ingleby@intel.com>
* Copyright (c) 2014 - 2015 Intel Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#include "uart.h"
#include "types.hpp"
#include <stdlib.h>
#include <stdexcept>
#include <cstring>
namespace mraa
{
/**
* @brief API to UART (enabling only)
*
* This file defines the UART interface for libmraa
*
* @snippet Uart-example.cpp Interesting
*/
class Uart
{
public:
/**
* Uart Constructor, takes a pin number which will map directly to the
* linux uart number, this 'enables' the uart, nothing more
*
* @param uart the index of the uart set to use
*/
Uart(int uart)
{
m_uart = mraa_uart_init(uart);
if (m_uart == NULL) {
throw std::invalid_argument("Error initialising UART");
}
}
/**
* Uart Constructor, takes a string to the path of the serial
* interface that is needed.
*
* @param uart the index of the uart set to use
*/
Uart(std::string path)
{
m_uart = mraa_uart_init_raw(path.c_str());
if (m_uart == NULL) {
throw std::invalid_argument("Error initialising UART");
}
}
/**
* Uart Constructor, takes a pointer to the UART context and initialises
* the UART class
*
* @param void * to a UART context
*/
Uart(void* uart_context)
{
m_uart = (mraa_uart_context) uart_context;
if (m_uart == NULL) {
throw std::invalid_argument("Invalid UART context");
}
}
/**
* Uart destructor
*/
~Uart()
{
mraa_uart_stop(m_uart);
}
/**
* Get string with tty device path within Linux
* For example. Could point to "/dev/ttyS0"
*
* @return char pointer of device path
*/
std::string
getDevicePath()
{
std::string ret_val(mraa_uart_get_dev_path(m_uart));
return ret_val;
}
/**
* Read bytes from the device into char* buffer
*
* @param data buffer pointer
* @param length maximum size of buffer
* @return numbers of bytes read
*/
int
read(char* data, int length)
{
return mraa_uart_read(m_uart, data, (size_t) length);
}
/**
* Write bytes in String object to a device
*
* @param data buffer pointer
* @param length maximum size of buffer
* @return the number of bytes written, or -1 if an error occurred
*/
int
write(const char* data, int length)
{
return mraa_uart_write(m_uart, data, (size_t) length);
}
/**
* Read bytes from the device into a String object
*
* @param length to read
* @throws std::bad_alloc If there is no space left for read.
* @return string of data
*/
std::string
readStr(int length)
{
char* data = (char*) malloc(sizeof(char) * length);
if (data == NULL) {
throw std::bad_alloc();
}
int v = mraa_uart_read(m_uart, data, (size_t) length);
std::string ret(data, v);
free(data);
return ret;
}
/**
* Write bytes in String object to a device
*
* @param string to write
* @return the number of bytes written, or -1 if an error occurred
*/
int
writeStr(std::string data)
{
// this is data.length() not +1 because we want to avoid the '\0' char
return mraa_uart_write(m_uart, data.c_str(), (data.length()));
}
/**
* Check to see if data is available on the device for reading
*
* @param millis number of milliseconds to wait, or 0 to return immediately
* @return true if there is data available to read, false otherwise
*/
bool
dataAvailable(unsigned int millis = 0)
{
if (mraa_uart_data_available(m_uart, millis))
return true;
else
return false;
}
/**
* Flush the outbound data.
* Blocks until complete.
*
* @return Result of operation
*/
Result
flush()
{
return (Result) mraa_uart_flush(m_uart);
}
/**
* Set the baudrate.
* Takes an int and will attempt to decide what baudrate is
* to be used on the UART hardware.
*
* @param baud unsigned int of baudrate i.e. 9600
* @return Result of operation
*/
Result
setBaudRate(unsigned int baud)
{
return (Result) mraa_uart_set_baudrate(m_uart, baud);
}
/**
* Set the transfer mode
* For example setting the mode to 8N1 would be
* "dev.setMode(8,UART_PARITY_NONE , 1)"
*
* @param bytesize data bits
* @param parity Parity bit setting
* @param stopbits stop bits
* @return Result of operation
*/
Result
setMode(int bytesize, UartParity parity, int stopbits)
{
return (Result) mraa_uart_set_mode(m_uart, bytesize, (mraa_uart_parity_t) parity, stopbits);
}
/**
* Set the flowcontrol
*
* @param xonxoff XON/XOFF Software flow control.
* @param rtscts RTS/CTS out of band hardware flow control
* @return Result of operation
*/
Result
setFlowcontrol(bool xonxoff, bool rtscts)
{
return (Result) mraa_uart_set_flowcontrol(m_uart, xonxoff, rtscts);
}
/**
* Set the timeout for read and write operations
* <= 0 will disable that timeout
*
* @param read read timeout
* @param write write timeout
* @param interchar inbetween char timeout
* @return Result of operation
*/
Result
setTimeout(int read, int write, int interchar)
{
return (Result) mraa_uart_set_timeout(m_uart, read, write, interchar);
}
/**
* Set the blocking state for write operations
*
* @param dev The UART context
* @param nonblock new nonblocking state
* @return Result of operation
*/
Result
SetNonBlocking(bool nonblock)
{
return (Result) mraa_uart_set_non_blocking(m_uart, nonblock);
}
private:
mraa_uart_context m_uart;
};
}

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/*
* Author: Jon Trulson <jtrulson@ics.com>
* Copyright (c) 2016 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
/**
* @file
* @brief UART OW module
*
* This module allows one to use MRAA's UART support in order to
* interact with Dallas 1-wire compliant devices on a 1-wire bus. It
* makes use of the UART for timing purposes. The principle of
* operation is described here:
* https://www.maximintegrated.com/en/app-notes/index.mvp/id/214
*
* It is important the you use a UART with CMOS/TTL level voltages
* (3.3v/5v) RX and TX lines. DO NOT use standard RS232 level
* voltages, or you are going to have a bad day.
*
* In addition, a diode should be placed across the RX and
* TX lines like so:
*
* -|
* U|
* A| TX---|<--+
* R| |
* T| RX-------o--------o 1-wire data bus
* -|
*
* The diode on TX is a 1N4148 (cheap and common), with the cathode
* connected to TX, and the anode connected to RX and the rest of the
* 1-wire data line.
*
* @snippet uart_ow.c Interesting
*/
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include "common.h"
#include "uart.h"
/* for now, we simply use the normal MRAA UART context */
typedef struct _mraa_uart_ow {
mraa_uart_context uart;
/* search state */
unsigned char ROM_NO[8]; /* 8 byte (64b) rom code */
int LastDiscrepancy;
int LastFamilyDiscrepancy;
mraa_boolean_t LastDeviceFlag;
} *mraa_uart_ow_context;
/* 8 bytes (64 bits) for a device rom code */
static const int MRAA_UART_OW_ROMCODE_SIZE = 8;
/**
* UART One Wire ROM related Command bytes
*/
typedef enum {
MRAA_UART_OW_CMD_READ_ROM = 0x33, /**< read rom, when only one device on bus */
MRAA_UART_OW_CMD_MATCH_ROM = 0x55, /**< match a specific rom code */
MRAA_UART_OW_CMD_SKIP_ROM = 0xcc, /**< skip match/search rom */
MRAA_UART_OW_CMD_SEARCH_ROM_ALARM = 0xec, /**< search all roms in alarm state */
MRAA_UART_OW_CMD_SEARCH_ROM = 0xf0 /**< search all rom codes */
} mraa_uart_ow_rom_cmd_t;
/**
* Initialise uart_ow_context, uses UART board mapping
*
* @param uart the index of the uart set to use
* @return uart_ow context or NULL
*/
mraa_uart_ow_context mraa_uart_ow_init(int uart);
/**
* Initialise a raw uart_ow_context. No board setup.
*
* @param path for example "/dev/ttyS0"
* @return uart_ow context or NULL
*/
mraa_uart_ow_context mraa_uart_ow_init_raw(const char* path);
/**
* Get char pointer with tty device path within Linux
* For example. Could point to "/dev/ttyS0"
*
* @param dev uart_ow context
* @return char pointer of device path
*/
const char* mraa_uart_ow_get_dev_path(mraa_uart_ow_context dev);
/**
* Destroy a mraa_uart_ow_context
*
* @param dev uart_ow context
* @return mraa_result_t
*/
mraa_result_t mraa_uart_ow_stop(mraa_uart_ow_context dev);
/**
* Read a byte from the 1-wire bus
*
* @param dev uart_ow context
* @return the byte read or -1 for error
*/
int mraa_uart_ow_read_byte(mraa_uart_ow_context dev);
/**
* Write a byte to a 1-wire bus
*
* @param dev uart_ow context
* @param byte the byte to write to the bus
* @return the byte read back during the time slot or -1 for error
*/
int mraa_uart_ow_write_byte(mraa_uart_ow_context dev, uint8_t byte);
/**
* Write a bit to a 1-wire bus and read a bit corresponding to the
* time slot back. This is possible due to the way we wired the TX
* and RX together with a diode, forming a loopback.
*
* @param dev uart_ow context
* @param bit the bit to write to the bus
* @return the bit read back during the time slot or -1 for error
*/
int mraa_uart_ow_bit(mraa_uart_ow_context dev, uint8_t bit);
/**
* Send a reset pulse to the 1-wire bus and test for device presence
*
* @param dev uart_ow context
* @return one of the mraa_result_t values
*/
mraa_result_t mraa_uart_ow_reset(mraa_uart_ow_context dev);
/**
* Begin a rom code search of the 1-wire bus. This function
* implements the 1-wire search algorithm. See the uart_ow.c example
* for an idea on how to use this function to identify all devices
* present on the bus.
*
* @param dev uart_ow context
* @param start true to start a new search from scratch, false to
* continue an existing search
* @param id the 8-byte rom code id of the current matched device when
* a device is found
* @return one of the mraa_result_t values
*/
mraa_result_t mraa_uart_ow_rom_search(mraa_uart_ow_context dev, mraa_boolean_t start, uint8_t* id);
/**
* Send a command byte to a device on the 1-wire bus
*
* @param dev uart_ow context
* @param command the command byte to send
* @param id the rom code id of the device to receive the command,
* NULL for all devices on the bus
* @return one of the mraa_result_t values
*/
mraa_result_t mraa_uart_ow_command(mraa_uart_ow_context dev, uint8_t command, uint8_t* id);
/**
* Perform a Dallas 1-wire compliant CRC8 computation on a buffer
*
* @param buffer the buffer containing the data
* @param length the length of the buffer
* @return the computed CRC
*/
uint8_t mraa_uart_ow_crc8(uint8_t* buffer, uint16_t length);
#ifdef __cplusplus
}
#endif

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/*
* Author: Jon Trulson <jtrulson@ics.com>
* Copyright (c) 2016 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#include "uart_ow.h"
#include "types.hpp"
#include <stdexcept>
#include <cstring>
namespace mraa
{
/**
* @brief API for UART One Wire
*
* This file defines the UartOW (UART to Dallas 1-wire) interface for libmraa
*
* @snippet UartOW.cpp Interesting
*/
class UartOW
{
public:
/**
* UartOW Constructor, takes a pin number which will map directly to the
* linux uart number, this 'enables' the uart, nothing more
*
* @throws std::invalid_argument in case of error
* @param uart the index of the uart to use
*/
UartOW(int uart)
{
m_uart = mraa_uart_ow_init(uart);
if (m_uart == NULL) {
throw std::invalid_argument("Error initialising UART_OW");
}
}
/**
* UartOW Constructor, takes a string to the path of the serial
* interface that is needed.
*
* @throws std::invalid_argument in case of error
* @param path the file path for the UART to use
*/
UartOW(std::string path)
{
m_uart = mraa_uart_ow_init_raw(path.c_str());
if (m_uart == NULL) {
throw std::invalid_argument("Error initialising UART");
}
}
/**
* Uart destructor
*/
~UartOW()
{
mraa_uart_ow_stop(m_uart);
}
/**
* Get string with tty device path within Linux
* For example. Could point to "/dev/ttyS0"
*
* @return char pointer of device path
*/
std::string
getDevicePath()
{
std::string ret_val(mraa_uart_ow_get_dev_path(m_uart));
return ret_val;
}
/**
* Read a byte from the 1-wire bus
*
* @throws std::invalid_argument in case of error
* @return the byte read
*/
uint8_t
readByte()
{
int res = mraa_uart_ow_read_byte(m_uart);
if (res == -1) {
throw std::invalid_argument("Unknown UART_OW error");
}
return (uint8_t) res;
}
/**
* Write a byte to a 1-wire bus
*
* @param byte the byte to write to the bus
*
* @throws std::invalid_argument in case of error
* @return the byte read back during the time slot
*/
uint8_t
writeByte(uint8_t byte)
{
int res = mraa_uart_ow_write_byte(m_uart, byte);
if (res == -1) {
throw std::invalid_argument("Unknown UART_OW error");
}
return (uint8_t) res;
}
/**
* Write a bit to a 1-wire bus and read a bit corresponding to the
* time slot back. This is possible due to the way we wired the TX
* and RX together with a diode, forming a loopback.
*
* @param bit the bit to write to the bus
* @throws std::invalid_argument in case of error
* @return the bit read back during the time slot
*/
bool
writeBit(bool bit)
{
int res = mraa_uart_ow_bit(m_uart, (bit) ? 1 : 0);
if (res == -1) {
throw std::invalid_argument("Unknown UART_OW error");
}
return ((res) ? true : false);
}
/**
* Send a reset pulse to the 1-wire bus and test for device presence
*
* @return one of the mraa::Result values
*/
mraa::Result
reset()
{
return (mraa::Result) mraa_uart_ow_reset(m_uart);
}
/**
* Begin a rom code search of the 1-wire bus. This function
* implements the 1-wire search algorithm. See the uart_ow.c example
* for an idea on how to use this function to identify all devices
* present on the bus.
*
* @param start true to start a search from scratch, false to
* continue a previously started search
* @param id the 8-byte rom code id of the current matched device when a
* device is found
* @return one of the mraa::Result values
*/
mraa::Result
search(bool start, uint8_t* id)
{
return (mraa::Result) mraa_uart_ow_rom_search(m_uart, (start) ? 1 : 0, id);
}
/**
* Begin a rom code search of the 1-wire bus. This function
* implements the 1-wire search algorithm. See the UartOW.cpp
* example for an idea on how to use this function to identify all
* devices present on the bus.
*
* @param start true to start a search from scratch, false to
* continue a previously started search
* @return an empty string if no [more] devices are found, or a
* string containing the 8-byte romcode of a detected device.
*/
std::string
search(bool start)
{
uint8_t id[MRAA_UART_OW_ROMCODE_SIZE];
mraa_result_t rv;
rv = mraa_uart_ow_rom_search(m_uart, (start) ? 1 : 0, id);
if (rv == MRAA_SUCCESS) {
// we found one
std::string idStr((char*) id, MRAA_UART_OW_ROMCODE_SIZE);
return idStr;
} else {
// failure, or end of search
return "";
}
}
/**
* Send a command byte to a device on the 1-wire bus
*
* @param command the command byte to send
* @param id the rom code id of the device to receive the command,
* NULL for all devices on the bus
* @return one of the mraa::Result values
*/
mraa::Result
command(uint8_t command, uint8_t* id)
{
return (mraa::Result) mraa_uart_ow_command(m_uart, command, id);
}
/**
* Send a command byte to a device on the 1-wire bus, supplying
* the id as a std::string
*
* @param command the command byte to send
* @param id std::string representing the code id of the device to
* receive the command, or an empty string for all devices on the
* bus. This string should be 8 bytes in size.
* @return one of the mraa::Result values
*/
mraa::Result
command(uint8_t command, std::string id)
{
if (id.empty() == 0)
return (mraa::Result) mraa_uart_ow_command(m_uart, command, NULL);
else {
if (id.size() != 8) {
// Only 8 byte romcodes are legal.
throw std::invalid_argument(std::string(__FUNCTION__) +
": id must be 8 bytes only");
}
return (mraa::Result) mraa_uart_ow_command(m_uart, command, (uint8_t*) id.c_str());
}
}
/**
* Perform a Dallas 1-wire compliant CRC8 computation on a buffer
*
* @param buffer the buffer containing the data
* @param length the length of the buffer
* @return the computed CRC
*/
uint8_t
crc8(uint8_t* buffer, uint16_t length)
{
return mraa_uart_ow_crc8(buffer, length);
}
/**
* Perform a Dallas 1-wire compliant CRC8 computation on a
* std::string based buffer
*
* @param buffer std::string buffer containing the data
* @return the computed CRC
*/
uint8_t
crc8(std::string buffer)
{
return mraa_uart_ow_crc8((uint8_t*) buffer.c_str(), buffer.size());
}
private:
mraa_uart_ow_context m_uart;
};
}